Add mapping in MachineFunction from SSA regs to Register Classes. Also,

uncovered a bug where registers were not being put in a map if they were not
found...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4776 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp
index f0ffc679ed75a7a8ae2cf624a53a47a99d0a4f32..6ac3d0b5384288ea6ce34fbc1a20b51c5811310d 100644 (file)
--- a/lib/Target/X86/InstSelectSimple.cpp
+++ b/lib/Target/X86/InstSelectSimple.cpp
@@ -17,7 +17,11 @@
 #include "llvm/Constants.h"
 #include "llvm/Pass.h"
 #include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/InstVisitor.h"
+#include "llvm/Target/MRegisterInfo.h"
+#include <map>
 
 using namespace MOTy;  // Get Use, Def, UseAndDef
 
@@ -105,8 +109,14 @@ namespace {
     unsigned getReg(Value &V) { return getReg(&V); }  // Allow references
     unsigned getReg(Value *V) {
       unsigned &Reg = RegMap[V];
-      if (Reg == 0)
+      if (Reg == 0) {
         Reg = CurReg++;
+        RegMap[V] = Reg;
+
+        // Add the mapping of regnumber => reg class to MachineFunction
+        F->addRegMap(Reg,
+                     TM.getRegisterInfo()->getRegClassForType(V->getType()));
+      }
 
       // If this operand is a constant, emit the code to copy the constant into
       // the register here...

diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index f0ffc679ed75a7a8ae2cf624a53a47a99d0a4f32..6ac3d0b5384288ea6ce34fbc1a20b51c5811310d 100644 (file)
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -17,7 +17,11 @@
 #include "llvm/Constants.h"
 #include "llvm/Pass.h"
 #include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/InstVisitor.h"
+#include "llvm/Target/MRegisterInfo.h"
+#include <map>
 
 using namespace MOTy;  // Get Use, Def, UseAndDef
 
@@ -105,8 +109,14 @@ namespace {
     unsigned getReg(Value &V) { return getReg(&V); }  // Allow references
     unsigned getReg(Value *V) {
       unsigned &Reg = RegMap[V];
-      if (Reg == 0)
+      if (Reg == 0) {
         Reg = CurReg++;
+        RegMap[V] = Reg;
+
+        // Add the mapping of regnumber => reg class to MachineFunction
+        F->addRegMap(Reg,
+                     TM.getRegisterInfo()->getRegClassForType(V->getType()));
+      }
 
       // If this operand is a constant, emit the code to copy the constant into
       // the register here...