\r
#define PORT_RK 90\r
#define UART_USR 0x1F /* UART Status Register */\r
+#define UART_USR_BUSY (1)\r
#define UART_IER_PTIME 0x80 /* Programmable THRE Interrupt Mode Enable */\r
#define RX_TIMEOUT (3000*10) //uint ms\r
\r
/* Read the USR to clear any busy interrupts */\r
serial_in(up, UART_USR);\r
serial_in(up, UART_RX);\r
- if (--tmout == 0)\r
+ if (--tmout == 0){\r
+ dev_info(up->port.dev, "set lcr timeout\n");\r
break;\r
+ }\r
+ \r
udelay(1);\r
}\r
}\r
/*RX*/\r
static void serial_rk_dma_rxcb(void *buf, int size, enum rk29_dma_buffresult result) {\r
\r
-// printk("^\n");\r
\r
}\r
\r
* interrupt meaning an LCR write attempt occured while the\r
* UART was busy. The interrupt must be cleared by reading\r
* the UART status register (USR) and the LCR re-written. */\r
- serial_in(up, UART_USR);\r
- serial_out(up, UART_LCR, up->lcr);\r
-\r
+ \r
+ if(!(serial_in(up, UART_USR) & UART_USR_BUSY)){\r
+ serial_out(up, UART_LCR, up->lcr);\r
+ }\r
+ \r
handled = 1;\r
- DEBUG_INTR("busy ");\r
+ dev_info(up->port.dev, "the serial is busy\n");\r
}\r
DEBUG_INTR("end(%d).\n", handled);\r
\r
quot = uart_get_divisor(port, baud);\r
\r
\r
- dev_info(up->port.dev, "*****baud:%d*******\n", baud);\r
- dev_info(up->port.dev, "*****quot:%d*******\n", quot);\r
+// dev_info(up->port.dev, "*****baud:%d*******\n", baud);\r
+// dev_info(up->port.dev, "*****quot:%d*******\n", quot);\r
\r
if (baud < 2400){\r
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;\r
//added by hhb@rock-chips.com\r
if(up->prk29_uart_dma_t->use_timer == 1){\r
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_01;\r
- //set time out value according to the baud rate\r
-/*\r
- up->prk29_uart_dma_t->rx_timeout = bits*1000*1024/baud + 1;\r
-\r
- if(up->prk29_uart_dma_t->rx_timeout < 10){\r
- up->prk29_uart_dma_t->rx_timeout = 10;\r
- }\r
- if(up->prk29_uart_dma_t->rx_timeout > 25){\r
- up->prk29_uart_dma_t->rx_timeout = 25;\r
- }\r
- printk("%s:time:%d, bits:%d, baud:%d\n", __func__, up->prk29_uart_dma_t->rx_timeout, bits, baud);\r
- up->prk29_uart_dma_t->rx_timeout = 7;\r
-*/\r
}\r
else{\r
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 | UART_FCR_T_TRIG_01;\r
up->mcr &= ~UART_MCR_AFE;\r
if (termios->c_cflag & CRTSCTS){\r
up->mcr |= UART_MCR_AFE;\r
- //dev_info(up->port.dev, "*****UART_MCR_AFE*******\n");\r
}\r
\r
\r
up->lcr = cval; /* Save LCR */\r
\r
serial_out(up, UART_FCR, fcr); /* set fcr */\r
-// fcr |= UART_FCR_DMA_SELECT;\r
-// serial_out(up, UART_FCR, fcr); /* set fcr */\r
+\r
serial_rk_set_mctrl(&up->port, up->port.mctrl);\r
\r
spin_unlock_irqrestore(&up->port.lock, flags);\r