ARM: tegra: Add PLL_M_UD and PLL_C_UD to tegra124-car binding header

Add these clocks to the binding header so that EMC timings that have
them as parent can refer to the clocks.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>

diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h
index 8a4c5892890f3c587e48dbd4d6de942e0c4a3820..6bac637fd635d16717b027b136ba70bba465276b 100644 (file)
--- a/include/dt-bindings/clock/tegra124-car.h
+++ b/include/dt-bindings/clock/tegra124-car.h
@@ -337,6 +337,10 @@
 #define TEGRA124_CLK_DSIB_MUX 310
 #define TEGRA124_CLK_SOR0_LVDS 311
 #define TEGRA124_CLK_XUSB_SS_DIV2 312
-#define TEGRA124_CLK_CLK_MAX 313
+
+#define TEGRA124_CLK_PLL_M_UD 313
+#define TEGRA124_CLK_PLL_C_UD 314
+
+#define TEGRA124_CLK_CLK_MAX 315
 
 #endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */