[X86][AVX512DQ] Add fpclass instruction

Differential Revision: http://reviews.llvm.org/D12931

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248115 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/IR/IntrinsicsX86.td b/include/llvm/IR/IntrinsicsX86.td
index 98731f80b03dbb673d490d301ae0b29021c259ab..b2a468b30ad3f71276fd2cd35fb656eb92f53aa5 100644 (file)
--- a/include/llvm/IR/IntrinsicsX86.td
+++ b/include/llvm/IR/IntrinsicsX86.td
@@ -1609,6 +1609,30 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx512_mask_ptestm_q_512 : GCCBuiltin<"__builtin_ia32_ptestmq512">,
         Intrinsic<[llvm_i8_ty], [llvm_v8i64_ty, llvm_v8i64_ty,
                   llvm_i8_ty], [IntrNoMem]>;
+  def int_x86_avx512_mask_fpclass_pd_128 : 
+         GCCBuiltin<"__builtin_ia32_fpclasspd128_mask">,
+          Intrinsic<[llvm_i8_ty], [llvm_v2f64_ty, llvm_i32_ty, llvm_i8_ty],
+          [IntrNoMem]>;
+  def int_x86_avx512_mask_fpclass_pd_256 : 
+         GCCBuiltin<"__builtin_ia32_fpclasspd256_mask">,
+          Intrinsic<[llvm_i8_ty], [llvm_v4f64_ty, llvm_i32_ty, llvm_i8_ty],
+          [IntrNoMem]>;
+  def int_x86_avx512_mask_fpclass_pd_512 : 
+         GCCBuiltin<"__builtin_ia32_fpclasspd512_mask">,
+          Intrinsic<[llvm_i8_ty], [llvm_v8f64_ty, llvm_i32_ty, llvm_i8_ty],
+          [IntrNoMem]>;
+  def int_x86_avx512_mask_fpclass_ps_128 : 
+         GCCBuiltin<"__builtin_ia32_fpclassps128_mask">,
+          Intrinsic<[llvm_i8_ty], [llvm_v4f32_ty, llvm_i32_ty, llvm_i8_ty],
+          [IntrNoMem]>;
+  def int_x86_avx512_mask_fpclass_ps_256 : 
+         GCCBuiltin<"__builtin_ia32_fpclassps256_mask">,
+          Intrinsic<[llvm_i8_ty], [llvm_v8f32_ty, llvm_i32_ty, llvm_i8_ty],
+          [IntrNoMem]>;
+  def int_x86_avx512_mask_fpclass_ps_512 : 
+         GCCBuiltin<"__builtin_ia32_fpclassps512_mask">,
+          Intrinsic<[llvm_i16_ty], [llvm_v16f32_ty, llvm_i32_ty, llvm_i16_ty],
+          [IntrNoMem]>;
 }
 
 // Vector extract sign mask

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 4f18b82bd99dd4208e6b90719b5cee0e0eb8f264..7cb3f3fa306b58ae00ba25cb964c0ce5cb4140d5 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -15726,6 +15726,8 @@ static SDValue getVectorMaskingNode(SDValue Op, SDValue Mask,
       case X86ISD::CMPM:
       case X86ISD::CMPMU:
         return DAG.getNode(ISD::AND, dl, VT, Op, VMask);
+      case X86ISD::VFPCLASS:
+        return DAG.getNode(ISD::OR, dl, VT, Op, VMask);
       case X86ISD::VTRUNC:
       case X86ISD::VTRUNCS:
       case X86ISD::VTRUNCUS:
@@ -16052,6 +16054,26 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, const X86Subtarget *Subtarget
                                               Src1, Src2, Src3),
                                   Mask, PassThru, Subtarget, DAG);
     }
+    case FPCLASS: {
+      // FPclass intrinsics with mask
+      //
+       SDValue Src1 = Op.getOperand(1);
+       EVT VT = Src1.getValueType();
+       EVT MaskVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1,
+                                      VT.getVectorNumElements());
+       SDValue Imm = Op.getOperand(2);
+       SDValue Mask = Op.getOperand(3);
+       EVT BitcastVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1,
+                                        Mask.getValueType().getSizeInBits());
+       SDValue FPclass = DAG.getNode(IntrData->Opc0, dl, MaskVT, Src1, Imm);
+       SDValue FPclassMask = getVectorMaskingNode(FPclass, Mask,
+                                                 DAG.getTargetConstant(0, dl, MaskVT),
+                                                 Subtarget, DAG);
+       SDValue Res = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, BitcastVT,
+                                 DAG.getUNDEF(BitcastVT), FPclassMask,
+                                 DAG.getIntPtrConstant(0, dl));
+       return DAG.getBitcast(Op.getValueType(), Res);
+    }
     case CMP_MASK:
     case CMP_MASK_CC: {
       // Comparison intrinsics with masks.
@@ -19709,6 +19731,7 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
   case X86ISD::UINT_TO_FP_RND:     return "X86ISD::UINT_TO_FP_RND";
   case X86ISD::FP_TO_SINT_RND:     return "X86ISD::FP_TO_SINT_RND";
   case X86ISD::FP_TO_UINT_RND:     return "X86ISD::FP_TO_UINT_RND";
+  case X86ISD::VFPCLASS:           return "X86ISD::VFPCLASS";
   }
   return nullptr;
 }

diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index de9b4cf5023f5d9b4309a00e45618a2ec1895c97..949c6511bde59b26d6ed089d3df31f1dc233bb99 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -397,6 +397,8 @@ namespace llvm {
       VREDUCE,
       // RndScale - Round FP Values To Include A Given Number Of Fraction Bits
       VRNDSCALE,
+      // VFPCLASS - Tests Types Of a FP Values
+      VFPCLASS, 
       // Broadcast scalar to vector
       VBROADCAST,
       // Broadcast subvector to vector

diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td
index 34e952d7b3174bf2c0bcf446736d3bfed6ff84d0..c510095a4b8b44376425896c459813454f1bb322 100644 (file)
--- a/lib/Target/X86/X86InstrAVX512.td
+++ b/lib/Target/X86/X86InstrAVX512.td
@@ -1796,6 +1796,89 @@ def : Pat<(v8i1 (X86cmpmu (v8i32 VR256X:$src1), (v8i32 VR256X:$src2), imm:$cc)),
             (v16i32 (SUBREG_TO_REG (i32 0), VR256X:$src2, sub_ymm)),
             imm:$cc), VK8)>;
 
+// ----------------------------------------------------------------
+// FPClass
+//handle fpclass instruction mask = fpclass(reg_vec, reg_vec, imm)
+//                                  fpclass(reg_vec, mem_vec, imm)
+//                                  fpclass(reg_vec, broadcast(eltVt), imm)
+multiclass avx512_vector_fpclass<bits<8> opc, string OpcodeStr, SDNode OpNode,
+                                 X86VectorVTInfo _, string mem, string broadcast>{
+  def rr : AVX512<opc, MRMSrcReg, (outs _.KRC:$dst),
+                      (ins _.RC:$src1, i32u8imm:$src2),
+                      OpcodeStr##_.Suffix#"\t{$src2, $src1, $dst | $dst, $src1, $src2}",
+                      [(set _.KRC:$dst,(OpNode (_.VT _.RC:$src1),
+                                       (i32 imm:$src2)))], NoItinerary>;
+  def rrk : AVX512<opc, MRMSrcReg, (outs _.KRC:$dst),
+                      (ins _.KRCWM:$mask, _.RC:$src1, i32u8imm:$src2),
+                      OpcodeStr##_.Suffix#
+                      "\t{$src2, $src1, $dst {${mask}}| $dst {${mask}}, $src1, $src2}",
+                      [(set _.KRC:$dst,(or _.KRCWM:$mask, 
+                                       (OpNode (_.VT _.RC:$src1),
+                                       (i32 imm:$src2))))], NoItinerary>, EVEX_K;
+  let mayLoad = 1 in {
+    def rm : AVX512<opc, MRMSrcMem, (outs _.KRC:$dst),
+                      (ins _.MemOp:$src1, i32u8imm:$src2),
+                      OpcodeStr##_.Suffix##mem#
+                      "\t{$src2, $src1, $dst | $dst, $src1, $src2}",
+                      [(set _.KRC:$dst,(OpNode 
+                                       (_.VT (bitconvert (_.LdFrag addr:$src1))),
+                                       (i32 imm:$src2)))], NoItinerary>;
+    def rmk : AVX512<opc, MRMSrcMem, (outs _.KRC:$dst),
+                      (ins _.KRCWM:$mask, _.MemOp:$src1, i32u8imm:$src2),
+                      OpcodeStr##_.Suffix##mem#
+                      "\t{$src2, $src1, $dst {${mask}} | $dst {${mask}}, $src1, $src2}",
+                      [(set _.KRC:$dst, (or _.KRCWM:$mask, (OpNode 
+                                    (_.VT (bitconvert (_.LdFrag addr:$src1))),
+                                    (i32 imm:$src2))))], NoItinerary>, EVEX_K;
+    def rmb : AVX512<opc, MRMSrcMem, (outs _.KRC:$dst),
+                      (ins _.ScalarMemOp:$src1, i32u8imm:$src2),
+                      OpcodeStr##_.Suffix##broadcast##"\t{$src2, ${src1}"##
+                                        _.BroadcastStr##", $dst | $dst, ${src1}"
+                                                    ##_.BroadcastStr##", $src2}",
+                      [(set _.KRC:$dst,(OpNode 
+                                       (_.VT (X86VBroadcast 
+                                             (_.ScalarLdFrag addr:$src1))),
+                                       (i32 imm:$src2)))], NoItinerary>,EVEX_B;
+    def rmbk : AVX512<opc, MRMSrcMem, (outs _.KRC:$dst),
+                      (ins _.KRCWM:$mask, _.ScalarMemOp:$src1, i32u8imm:$src2),
+                      OpcodeStr##_.Suffix##broadcast##"\t{$src2, ${src1}"##
+                            _.BroadcastStr##", $dst {${mask}} | $dst {${mask}}, ${src1}"##
+                                                     _.BroadcastStr##", $src2}",
+                      [(set _.KRC:$dst,(or _.KRCWM:$mask, (OpNode 
+                                       (_.VT (X86VBroadcast 
+                                             (_.ScalarLdFrag addr:$src1))),
+                                       (i32 imm:$src2))))], NoItinerary>,
+                                                            EVEX_B, EVEX_K;
+  }
+}
+
+
+multiclass avx512_vector_fpclass_all<string OpcodeStr,
+            AVX512VLVectorVTInfo _, bits<8> opc, SDNode OpNode, Predicate prd, 
+                                                              string broadcast>{
+  let Predicates = [prd] in {
+    defm Z    : avx512_vector_fpclass<opc, OpcodeStr, OpNode, _.info512, "{z}", 
+                                      broadcast>, EVEX_V512;
+  }
+  let Predicates = [prd, HasVLX] in {
+    defm Z128 : avx512_vector_fpclass<opc, OpcodeStr, OpNode, _.info128, "{x}",
+                                      broadcast>, EVEX_V128;
+    defm Z256 : avx512_vector_fpclass<opc, OpcodeStr, OpNode, _.info256, "{y}",
+                                      broadcast>, EVEX_V256;
+  }
+}
+
+multiclass avx512_fp_fpclass_all<string OpcodeStr, bits<8> opcVec,
+                                 SDNode OpNode, Predicate prd>{
+  defm PS : avx512_vector_fpclass_all<OpcodeStr,  avx512vl_f32_info, opcVec, 
+                                      OpNode, prd, "{l}">, EVEX_CD8<32, CD8VF>;
+  defm PD : avx512_vector_fpclass_all<OpcodeStr,  avx512vl_f64_info, opcVec, 
+                                      OpNode, prd, "{q}">,EVEX_CD8<64, CD8VF> , VEX_W;
+}
+
+defm VFPCLASS : avx512_fp_fpclass_all<"vfpclass", 0x66, X86Vfpclass, HasDQI>,
+                                      AVX512AIi8Base,EVEX;
+
 //-----------------------------------------------------------------
 // Mask register copy, including
 // - copy between mask registers

diff --git a/lib/Target/X86/X86InstrFragmentsSIMD.td b/lib/Target/X86/X86InstrFragmentsSIMD.td
index 3abdb2ab5facc4a04333929b47de8a72cbae1a26..78dafc7e5433c260e90863ca1e9b778f370f4aa2 100644 (file)
--- a/lib/Target/X86/X86InstrFragmentsSIMD.td
+++ b/lib/Target/X86/X86InstrFragmentsSIMD.td
@@ -311,6 +311,9 @@ def X86VRange      : SDNode<"X86ISD::VRANGE",    SDTFPBinOpImmRound>;
 def X86VReduce     : SDNode<"X86ISD::VREDUCE",   SDTFPUnaryOpImmRound>;
 def X86VRndScale   : SDNode<"X86ISD::VRNDSCALE", SDTFPUnaryOpImmRound>;
 def X86VGetMant    : SDNode<"X86ISD::VGETMANT",  SDTFPUnaryOpImmRound>;
+def X86Vfpclass    : SDNode<"X86ISD::VFPCLASS", 
+                       SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>,
+                                            SDTCisVec<1>, SDTCisInt<2>]>, []>;
 
 def X86SubVBroadcast : SDNode<"X86ISD::SUBV_BROADCAST",
                     SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,

diff --git a/lib/Target/X86/X86IntrinsicsInfo.h b/lib/Target/X86/X86IntrinsicsInfo.h
index 32ed518835f5b1db1a5766716e378a58cc170258..26d5137186007fee26c51bd87f197b93f52bc6b2 100644 (file)
--- a/lib/Target/X86/X86IntrinsicsInfo.h
+++ b/lib/Target/X86/X86IntrinsicsInfo.h
@@ -18,7 +18,7 @@ namespace llvm {
 
 enum IntrinsicType {
   INTR_NO_TYPE,
-  GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, ADX,
+  GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, ADX, FPCLASS,
   INTR_TYPE_1OP, INTR_TYPE_2OP, INTR_TYPE_2OP_IMM8, INTR_TYPE_3OP, INTR_TYPE_4OP,
   CMP_MASK, CMP_MASK_CC, VSHIFT, VSHIFT_MASK, COMI,
   INTR_TYPE_1OP_MASK, INTR_TYPE_1OP_MASK_RM,
@@ -665,7 +665,13 @@ static const IntrinsicData  IntrinsicsWithoutChain[] = {
                      X86ISD::EXPAND, 0),
   X86_INTRINSIC_DATA(avx512_mask_expand_q_512,  COMPRESS_EXPAND_IN_REG,
                      X86ISD::EXPAND, 0),
-  X86_INTRINSIC_DATA(avx512_mask_getexp_pd_128, INTR_TYPE_1OP_MASK_RM,
+  X86_INTRINSIC_DATA(avx512_mask_fpclass_pd_128, FPCLASS, X86ISD::VFPCLASS, 0), \r
+  X86_INTRINSIC_DATA(avx512_mask_fpclass_pd_256, FPCLASS, X86ISD::VFPCLASS, 0), \r
+  X86_INTRINSIC_DATA(avx512_mask_fpclass_pd_512, FPCLASS, X86ISD::VFPCLASS, 0), \r
+  X86_INTRINSIC_DATA(avx512_mask_fpclass_ps_128, FPCLASS, X86ISD::VFPCLASS, 0), \r
+  X86_INTRINSIC_DATA(avx512_mask_fpclass_ps_256, FPCLASS, X86ISD::VFPCLASS, 0),\r
+  X86_INTRINSIC_DATA(avx512_mask_fpclass_ps_512, FPCLASS, X86ISD::VFPCLASS, 0), 
+  X86_INTRINSIC_DATA(avx512_mask_getexp_pd_128, INTR_TYPE_1OP_MASK_RM,\r
                      X86ISD::FGETEXP_RND, 0),
   X86_INTRINSIC_DATA(avx512_mask_getexp_pd_256, INTR_TYPE_1OP_MASK_RM,
                      X86ISD::FGETEXP_RND, 0),

diff --git a/test/CodeGen/X86/avx512dq-intrinsics.ll b/test/CodeGen/X86/avx512dq-intrinsics.ll
index a56ada0c85a994f27b49d066fbd60ac0980a34c8..7348229d35aae05f6c7a6e81a851d2c9e433ca1b 100644 (file)
--- a/test/CodeGen/X86/avx512dq-intrinsics.ll
+++ b/test/CodeGen/X86/avx512dq-intrinsics.ll
@@ -436,3 +436,34 @@ define <8 x i64>@test_int_x86_avx512_mask_inserti64x2_512(<8 x i64> %x0, <2 x i6
   %res4 = add <8 x i64> %res2, %res3
   ret <8 x i64> %res4
 }
+
+declare i8 @llvm.x86.avx512.mask.fpclass.pd.512(<8 x double>, i32, i8)
+
+; CHECK-LABEL: @test_int_x86_avx512_mask_fpclass_pd_512
+; CHECK-NOT: call 
+; CHECK: kmov 
+; CHECK: vfpclasspd
+; CHECK: {%k1} 
+; CHECK: vfpclasspd
+; CHECK: kmovb   %k0
+define i8 @test_int_x86_avx512_mask_fpclass_pd_512(<8 x double> %x0, i8 %x1) {
+       %res = call i8 @llvm.x86.avx512.mask.fpclass.pd.512(<8 x double> %x0, i32 2, i8 %x1)
+       %res1 = call i8 @llvm.x86.avx512.mask.fpclass.pd.512(<8 x double> %x0, i32 4, i8 -1)
+       %res2 = add i8 %res, %res1
+       ret i8 %res2
+}
+declare i16 @llvm.x86.avx512.mask.fpclass.ps.512(<16 x float>, i32, i16)
+
+; CHECK-LABEL: @test_int_x86_avx512_mask_fpclass_ps_512
+; CHECK-NOT: call 
+; CHECK: kmov 
+; CHECK: vfpclassps
+; CHECK: vfpclassps
+; CHECK: {%k1} 
+; CHECK: kmov
+define i16@test_int_x86_avx512_mask_fpclass_ps_512(<16 x float> %x0, i16 %x1) {
+       %res = call i16 @llvm.x86.avx512.mask.fpclass.ps.512(<16 x float> %x0, i32 4, i16 %x1)
+       %res1 = call i16 @llvm.x86.avx512.mask.fpclass.ps.512(<16 x float> %x0, i32 4, i16 -1)
+       %res2 = add i16 %res, %res1
+       ret i16 %res2
+}

diff --git a/test/CodeGen/X86/avx512dqvl-intrinsics.ll b/test/CodeGen/X86/avx512dqvl-intrinsics.ll
index 1eae5dd3d496948ba525ccf3bad4ea9e626cf335..22cfe1924b6b514e125465a977d5b5f8f5a1294e 100644 (file)
--- a/test/CodeGen/X86/avx512dqvl-intrinsics.ll
+++ b/test/CodeGen/X86/avx512dqvl-intrinsics.ll
@@ -1708,3 +1708,67 @@ define <4 x i64>@test_int_x86_avx512_mask_inserti64x2_256(<4 x i64> %x0, <2 x i6
   %res4 = add <4 x i64> %res3, %res2
   ret <4 x i64> %res4
 }
+
+declare i8 @llvm.x86.avx512.mask.fpclass.ps.128(<4 x float>, i32, i8)
+
+; CHECK-LABEL: @test_int_x86_avx512_mask_fpclass_ps_128
+; CHECK-NOT: call 
+; CHECK: kmov 
+; CHECK: vfpclassps
+; CHECK: {%k1} 
+; CHECK: vfpclassps
+; CHECK: kmovb   %k0
+define i8 @test_int_x86_avx512_mask_fpclass_ps_128(<4 x float> %x0, i8 %x1) {
+  %res = call i8 @llvm.x86.avx512.mask.fpclass.ps.128(<4 x float> %x0, i32 2, i8 %x1)
+  %res1 = call i8 @llvm.x86.avx512.mask.fpclass.ps.128(<4 x float> %x0, i32 4, i8 -1)
+  %res2 = add i8 %res, %res1
+  ret i8 %res2
+}
+
+declare i8 @llvm.x86.avx512.mask.fpclass.ps.256(<8 x float>, i32, i8)
+
+; CHECK-LABEL: @test_int_x86_avx512_mask_fpclass_ps_256
+; CHECK-NOT: call 
+; CHECK: kmov 
+; CHECK: vfpclassps
+; CHECK: {%k1} 
+; CHECK: vfpclassps
+; CHECK: kmovb   %k0
+define i8 @test_int_x86_avx512_mask_fpclass_ps_256(<8 x float> %x0, i8 %x1) {
+  %res = call i8 @llvm.x86.avx512.mask.fpclass.ps.256(<8 x float> %x0, i32 2, i8 %x1)
+  %res1 = call i8 @llvm.x86.avx512.mask.fpclass.ps.256(<8 x float> %x0, i32 4, i8 -1)
+  %res2 = add i8 %res, %res1
+  ret i8 %res2
+}
+
+declare i8 @llvm.x86.avx512.mask.fpclass.pd.128(<2 x double>, i32, i8)
+
+; CHECK-LABEL: @test_int_x86_avx512_mask_fpclass_pd_128
+; CHECK-NOT: call 
+; CHECK: kmov 
+; CHECK: vfpclasspd
+; CHECK: {%k1} 
+; CHECK: vfpclasspd
+; CHECK: kmovb   %k0
+define i8 @test_int_x86_avx512_mask_fpclass_pd_128(<2 x double> %x0, i8 %x1) {
+  %res =  call i8 @llvm.x86.avx512.mask.fpclass.pd.128(<2 x double> %x0, i32 4, i8 %x1)
+  %res1 = call i8 @llvm.x86.avx512.mask.fpclass.pd.128(<2 x double> %x0, i32 2, i8 -1)
+  %res2 = add i8 %res, %res1
+  ret i8 %res2
+}
+
+declare i8 @llvm.x86.avx512.mask.fpclass.pd.256(<4 x double>, i32, i8)
+
+; CHECK-LABEL: @test_int_x86_avx512_mask_fpclass_pd_256
+; CHECK-NOT: call 
+; CHECK: kmov 
+; CHECK: vfpclasspd
+; CHECK: {%k1} 
+; CHECK: vfpclasspd
+; CHECK: kmovb   %k0
+define i8 @test_int_x86_avx512_mask_fpclass_pd_256(<4 x double> %x0, i8 %x1) {
+  %res = call i8 @llvm.x86.avx512.mask.fpclass.pd.256(<4 x double> %x0, i32 2, i8 %x1)
+  %res1 = call i8 @llvm.x86.avx512.mask.fpclass.pd.256(<4 x double> %x0, i32 4, i8 -1)
+  %res2 = add i8 %res, %res1
+  ret i8 %res2
+}

diff --git a/test/MC/X86/x86-64-avx512dq.s b/test/MC/X86/x86-64-avx512dq.s
index 3ff5c34ef88a774f73c8e2e1a963fafa6e414c53..08b365d7f5b2179fa3c6d64cf68deeeb2151cbdd 100644 (file)
--- a/test/MC/X86/x86-64-avx512dq.s
+++ b/test/MC/X86/x86-64-avx512dq.s
@@ -3115,3 +3115,228 @@
 // CHECK:  encoding: [0xc5,0xcc,0x4a,0xd6]
           kaddw  %k6, %k6, %k2
 
+// CHECK: vfpclasspd $171, %zmm17, %k2
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x48,0x66,0xd1,0xab]
+          vfpclasspd $0xab, %zmm17, %k2
+
+// CHECK: vfpclasspd $171, %zmm17, %k2 {%k1}
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x49,0x66,0xd1,0xab]
+          vfpclasspd $0xab, %zmm17, %k2 {%k1}
+
+// CHECK: vfpclasspd $123,  %zmm17, %k2
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x48,0x66,0xd1,0x7b]
+          vfpclasspd $0x7b, %zmm17, %k2
+
+// CHECK: vfpclasspdz $123, (%rcx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x48,0x66,0x11,0x7b]
+          vfpclasspdz $0x7b,(%rcx), %k2
+
+// CHECK: vfpclasspdz $123, 291(%rax,%r14,8), %k2
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x48,0x66,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vfpclasspdz $0x7b,291(%rax,%r14,8), %k2
+
+// CHECK: vfpclasspdq $123, (%rcx){1to8}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x58,0x66,0x11,0x7b]
+          vfpclasspdq $0x7b,(%rcx){1to8}, %k2
+
+// CHECK: vfpclasspdz $123, 8128(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x48,0x66,0x52,0x7f,0x7b]
+          vfpclasspdz $0x7b,8128(%rdx), %k2
+
+// CHECK: vfpclasspdz $123, 8192(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x48,0x66,0x92,0x00,0x20,0x00,0x00,0x7b]
+          vfpclasspdz $0x7b,8192(%rdx), %k2
+
+// CHECK: vfpclasspdz $123, -8192(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x48,0x66,0x52,0x80,0x7b]
+          vfpclasspdz $0x7b,-8192(%rdx), %k2
+
+// CHECK: vfpclasspdz $123, -8256(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x48,0x66,0x92,0xc0,0xdf,0xff,0xff,0x7b]
+          vfpclasspdz $0x7b,-8256(%rdx), %k2
+
+// CHECK: vfpclasspdq $123, 1016(%rdx){1to8}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x58,0x66,0x52,0x7f,0x7b]
+          vfpclasspdq $0x7b,1016(%rdx){1to8}, %k2
+
+// CHECK: vfpclasspdq $123, 1024(%rdx){1to8}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x58,0x66,0x92,0x00,0x04,0x00,0x00,0x7b]
+          vfpclasspdq $0x7b,1024(%rdx){1to8}, %k2
+
+// CHECK: vfpclasspdq $123, -1024(%rdx){1to8}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x58,0x66,0x52,0x80,0x7b]
+          vfpclasspdq $0x7b,-1024(%rdx){1to8}, %k2
+
+// CHECK: vfpclasspdq $123, -1032(%rdx){1to8}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x58,0x66,0x92,0xf8,0xfb,0xff,0xff,0x7b]
+          vfpclasspdq $0x7b,-1032(%rdx){1to8}, %k2
+
+// CHECK: vfpclassps $171, %zmm21, %k2
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x48,0x66,0xd5,0xab]
+          vfpclassps $0xab, %zmm21, %k2
+
+// CHECK: vfpclassps $171, %zmm21, %k2 {%k2}
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x4a,0x66,0xd5,0xab]
+          vfpclassps $0xab, %zmm21, %k2 {%k2}
+
+// CHECK: vfpclassps $123,  %zmm21, %k2
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x48,0x66,0xd5,0x7b]
+          vfpclassps $0x7b, %zmm21, %k2
+
+// CHECK: vfpclasspsz $123, (%rcx), %k2
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x48,0x66,0x11,0x7b]
+          vfpclasspsz $0x7b,(%rcx), %k2
+
+// CHECK: vfpclasspsz $123, 291(%rax,%r14,8), %k2
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x48,0x66,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vfpclasspsz $0x7b,291(%rax,%r14,8), %k2
+
+// CHECK: vfpclasspsl $123, (%rcx){1to16}, %k2
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x58,0x66,0x11,0x7b]
+          vfpclasspsl $0x7b,(%rcx){1to16}, %k2
+
+// CHECK: vfpclasspsz $123, 8128(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x48,0x66,0x52,0x7f,0x7b]
+          vfpclasspsz $0x7b,8128(%rdx), %k2
+
+// CHECK: vfpclasspsz $123, 8192(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x48,0x66,0x92,0x00,0x20,0x00,0x00,0x7b]
+          vfpclasspsz $0x7b,8192(%rdx), %k2
+
+// CHECK: vfpclasspsz $123, -8192(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x48,0x66,0x52,0x80,0x7b]
+          vfpclasspsz $0x7b,-8192(%rdx), %k2
+
+// CHECK: vfpclasspsz $123, -8256(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x48,0x66,0x92,0xc0,0xdf,0xff,0xff,0x7b]
+          vfpclasspsz $0x7b,-8256(%rdx), %k2
+
+// CHECK: vfpclasspsl $123, 508(%rdx){1to16}, %k2
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x58,0x66,0x52,0x7f,0x7b]
+          vfpclasspsl $0x7b,508(%rdx){1to16}, %k2
+
+// CHECK: vfpclasspsl $123, 512(%rdx){1to16}, %k2
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x58,0x66,0x92,0x00,0x02,0x00,0x00,0x7b]
+          vfpclasspsl $0x7b,512(%rdx){1to16}, %k2
+
+// CHECK: vfpclasspsl $123, -512(%rdx){1to16}, %k2
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x58,0x66,0x52,0x80,0x7b]
+          vfpclasspsl $0x7b,-512(%rdx){1to16}, %k2
+
+// CHECK: vfpclasspsl $123, -516(%rdx){1to16}, %k2
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x58,0x66,0x92,0xfc,0xfd,0xff,0xff,0x7b]
+          vfpclasspsl $0x7b,-516(%rdx){1to16}, %k2
+
+// CHECK: vfpclasspd $171, %zmm19, %k2
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x48,0x66,0xd3,0xab]
+          vfpclasspd $0xab, %zmm19, %k2
+
+// CHECK: vfpclasspd $171, %zmm19, %k2 {%k6}
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x4e,0x66,0xd3,0xab]
+          vfpclasspd $0xab, %zmm19, %k2 {%k6}
+
+// CHECK: vfpclasspd $123,  %zmm19, %k2
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x48,0x66,0xd3,0x7b]
+          vfpclasspd $0x7b, %zmm19, %k2
+
+// CHECK: vfpclasspdz $123, (%rcx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x48,0x66,0x11,0x7b]
+          vfpclasspdz $0x7b,(%rcx), %k2
+
+// CHECK: vfpclasspdz $123, 4660(%rax,%r14,8), %k2
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x48,0x66,0x94,0xf0,0x34,0x12,0x00,0x00,0x7b]
+          vfpclasspdz $0x7b,4660(%rax,%r14,8), %k2
+
+// CHECK: vfpclasspdq $123, (%rcx){1to8}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x58,0x66,0x11,0x7b]
+          vfpclasspdq $0x7b,(%rcx){1to8}, %k2
+
+// CHECK: vfpclasspdz $123, 8128(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x48,0x66,0x52,0x7f,0x7b]
+          vfpclasspdz $0x7b,8128(%rdx), %k2
+
+// CHECK: vfpclasspdz $123, 8192(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x48,0x66,0x92,0x00,0x20,0x00,0x00,0x7b]
+          vfpclasspdz $0x7b,8192(%rdx), %k2
+
+// CHECK: vfpclasspdz $123, -8192(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x48,0x66,0x52,0x80,0x7b]
+          vfpclasspdz $0x7b,-8192(%rdx), %k2
+
+// CHECK: vfpclasspdz $123, -8256(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x48,0x66,0x92,0xc0,0xdf,0xff,0xff,0x7b]
+          vfpclasspdz $0x7b,-8256(%rdx), %k2
+
+// CHECK: vfpclasspdq $123, 1016(%rdx){1to8}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x58,0x66,0x52,0x7f,0x7b]
+          vfpclasspdq $0x7b,1016(%rdx){1to8}, %k2
+
+// CHECK: vfpclasspdq $123, 1024(%rdx){1to8}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x58,0x66,0x92,0x00,0x04,0x00,0x00,0x7b]
+          vfpclasspdq $0x7b,1024(%rdx){1to8}, %k2
+
+// CHECK: vfpclasspdq $123, -1024(%rdx){1to8}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x58,0x66,0x52,0x80,0x7b]
+          vfpclasspdq $0x7b,-1024(%rdx){1to8}, %k2
+
+// CHECK: vfpclasspdq $123, -1032(%rdx){1to8}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x58,0x66,0x92,0xf8,0xfb,0xff,0xff,0x7b]
+          vfpclasspdq $0x7b,-1032(%rdx){1to8}, %k2
+
+// CHECK: vfpclassps $171, %zmm17, %k4
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x48,0x66,0xe1,0xab]
+          vfpclassps $0xab, %zmm17, %k4
+
+// CHECK: vfpclassps $171, %zmm17, %k4 {%k2}
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x4a,0x66,0xe1,0xab]
+          vfpclassps $0xab, %zmm17, %k4 {%k2}
+
+// CHECK: vfpclassps $123,  %zmm17, %k4
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x48,0x66,0xe1,0x7b]
+          vfpclassps $0x7b, %zmm17, %k4
+
+// CHECK: vfpclasspsz $123, (%rcx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x48,0x66,0x21,0x7b]
+          vfpclasspsz $0x7b,(%rcx), %k4
+
+// CHECK: vfpclasspsz $123, 4660(%rax,%r14,8), %k4
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x48,0x66,0xa4,0xf0,0x34,0x12,0x00,0x00,0x7b]
+          vfpclasspsz $0x7b,4660(%rax,%r14,8), %k4
+
+// CHECK: vfpclasspsl $123, (%rcx){1to16}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x58,0x66,0x21,0x7b]
+          vfpclasspsl $0x7b,(%rcx){1to16}, %k4
+
+// CHECK: vfpclasspsz $123, 8128(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x48,0x66,0x62,0x7f,0x7b]
+          vfpclasspsz $0x7b,8128(%rdx), %k4
+
+// CHECK: vfpclasspsz $123, 8192(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x48,0x66,0xa2,0x00,0x20,0x00,0x00,0x7b]
+          vfpclasspsz $0x7b,8192(%rdx), %k4
+
+// CHECK: vfpclasspsz $123, -8192(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x48,0x66,0x62,0x80,0x7b]
+          vfpclasspsz $0x7b,-8192(%rdx), %k4
+
+// CHECK: vfpclasspsz $123, -8256(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x48,0x66,0xa2,0xc0,0xdf,0xff,0xff,0x7b]
+          vfpclasspsz $0x7b,-8256(%rdx), %k4
+
+// CHECK: vfpclasspsl $123, 508(%rdx){1to16}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x58,0x66,0x62,0x7f,0x7b]
+          vfpclasspsl $0x7b,508(%rdx){1to16}, %k4
+
+// CHECK: vfpclasspsl $123, 512(%rdx){1to16}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x58,0x66,0xa2,0x00,0x02,0x00,0x00,0x7b]
+          vfpclasspsl $0x7b,512(%rdx){1to16}, %k4
+
+// CHECK: vfpclasspsl $123, -512(%rdx){1to16}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x58,0x66,0x62,0x80,0x7b]
+          vfpclasspsl $0x7b,-512(%rdx){1to16}, %k4
+
+// CHECK: vfpclasspsl $123, -516(%rdx){1to16}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x58,0x66,0xa2,0xfc,0xfd,0xff,0xff,0x7b]
+          vfpclasspsl $0x7b,-516(%rdx){1to16}, %k4
+
+

diff --git a/test/MC/X86/x86-64-avx512dq_vl.s b/test/MC/X86/x86-64-avx512dq_vl.s
index 0b506986ccf893c77ecf3f8e79b4a06e9999a82b..31c150873de69b48c0a5af6d2e65ab382d63f2c9 100644 (file)
--- a/test/MC/X86/x86-64-avx512dq_vl.s
+++ b/test/MC/X86/x86-64-avx512dq_vl.s
@@ -3936,3 +3936,450 @@
 // CHECK:  encoding: [0x62,0xe3,0xfd,0x28,0x39,0xa2,0xf0,0xf7,0xff,0xff,0x7b]
           vextracti64x2 $0x7b, %ymm20,-2064(%rdx)
 
+// CHECK: vfpclasspd $171, %xmm18, %k2
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x08,0x66,0xd2,0xab]
+          vfpclasspd $0xab, %xmm18, %k2
+
+// CHECK: vfpclasspd $171, %xmm18, %k2 {%k7}
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x0f,0x66,0xd2,0xab]
+          vfpclasspd $0xab, %xmm18, %k2 {%k7}
+
+// CHECK: vfpclasspd $123,  %xmm18, %k2
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x08,0x66,0xd2,0x7b]
+          vfpclasspd $0x7b, %xmm18, %k2
+
+// CHECK: vfpclasspdx $123, (%rcx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x08,0x66,0x11,0x7b]
+          vfpclasspdx $0x7b,(%rcx), %k2
+
+// CHECK: vfpclasspdx $123, 291(%rax,%r14,8), %k2
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x08,0x66,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vfpclasspdx $0x7b,291(%rax,%r14,8), %k2
+
+// CHECK: vfpclasspdq $123, (%rcx){1to2}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x18,0x66,0x11,0x7b]
+          vfpclasspdq $0x7b,(%rcx){1to2}, %k2
+
+// CHECK: vfpclasspdx $123, 2032(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x08,0x66,0x52,0x7f,0x7b]
+          vfpclasspdx $0x7b,2032(%rdx), %k2
+
+// CHECK: vfpclasspdx $123, 2048(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x08,0x66,0x92,0x00,0x08,0x00,0x00,0x7b]
+          vfpclasspdx $0x7b,2048(%rdx), %k2
+
+// CHECK: vfpclasspdx $123, -2048(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x08,0x66,0x52,0x80,0x7b]
+          vfpclasspdx $0x7b,-2048(%rdx), %k2
+
+// CHECK: vfpclasspdx $123, -2064(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x08,0x66,0x92,0xf0,0xf7,0xff,0xff,0x7b]
+          vfpclasspdx $0x7b,-2064(%rdx), %k2
+
+// CHECK: vfpclasspdq $123, 1016(%rdx){1to2}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x18,0x66,0x52,0x7f,0x7b]
+          vfpclasspdq $0x7b,1016(%rdx){1to2}, %k2
+
+// CHECK: vfpclasspdq $123, 1024(%rdx){1to2}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x18,0x66,0x92,0x00,0x04,0x00,0x00,0x7b]
+          vfpclasspdq $0x7b,1024(%rdx){1to2}, %k2
+
+// CHECK: vfpclasspdq $123, -1024(%rdx){1to2}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x18,0x66,0x52,0x80,0x7b]
+          vfpclasspdq $0x7b,-1024(%rdx){1to2}, %k2
+
+// CHECK: vfpclasspdq $123, -1032(%rdx){1to2}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x18,0x66,0x92,0xf8,0xfb,0xff,0xff,0x7b]
+          vfpclasspdq $0x7b,-1032(%rdx){1to2}, %k2
+
+// CHECK: vfpclasspd $171, %ymm25, %k4
+// CHECK:  encoding: [0x62,0x93,0xfd,0x28,0x66,0xe1,0xab]
+          vfpclasspd $0xab, %ymm25, %k4
+
+// CHECK: vfpclasspd $171, %ymm25, %k4 {%k6}
+// CHECK:  encoding: [0x62,0x93,0xfd,0x2e,0x66,0xe1,0xab]
+          vfpclasspd $0xab, %ymm25, %k4 {%k6}
+
+// CHECK: vfpclasspd $123,  %ymm25, %k4
+// CHECK:  encoding: [0x62,0x93,0xfd,0x28,0x66,0xe1,0x7b]
+          vfpclasspd $0x7b, %ymm25, %k4
+
+// CHECK: vfpclasspdy $123, (%rcx), %k4
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x28,0x66,0x21,0x7b]
+          vfpclasspdy $0x7b,(%rcx), %k4
+
+// CHECK: vfpclasspdy $123, 291(%rax,%r14,8), %k4
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x28,0x66,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vfpclasspdy $0x7b,291(%rax,%r14,8), %k4
+
+// CHECK: vfpclasspdq $123, (%rcx){1to4}, %k4
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x38,0x66,0x21,0x7b]
+          vfpclasspdq $0x7b,(%rcx){1to4}, %k4
+
+// CHECK: vfpclasspdy $123, 4064(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x28,0x66,0x62,0x7f,0x7b]
+          vfpclasspdy $0x7b,4064(%rdx), %k4
+
+// CHECK: vfpclasspdy $123, 4096(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x28,0x66,0xa2,0x00,0x10,0x00,0x00,0x7b]
+          vfpclasspdy $0x7b,4096(%rdx), %k4
+
+// CHECK: vfpclasspdy $123, -4096(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x28,0x66,0x62,0x80,0x7b]
+          vfpclasspdy $0x7b,-4096(%rdx), %k4
+
+// CHECK: vfpclasspdy $123, -4128(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x28,0x66,0xa2,0xe0,0xef,0xff,0xff,0x7b]
+          vfpclasspdy $0x7b,-4128(%rdx), %k4
+
+// CHECK: vfpclasspdq $123, 1016(%rdx){1to4}, %k4
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x38,0x66,0x62,0x7f,0x7b]
+          vfpclasspdq $0x7b,1016(%rdx){1to4}, %k4
+
+// CHECK: vfpclasspdq $123, 1024(%rdx){1to4}, %k4
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x38,0x66,0xa2,0x00,0x04,0x00,0x00,0x7b]
+          vfpclasspdq $0x7b,1024(%rdx){1to4}, %k4
+
+// CHECK: vfpclasspdq $123, -1024(%rdx){1to4}, %k4
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x38,0x66,0x62,0x80,0x7b]
+          vfpclasspdq $0x7b,-1024(%rdx){1to4}, %k4
+
+// CHECK: vfpclasspdq $123, -1032(%rdx){1to4}, %k4
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x38,0x66,0xa2,0xf8,0xfb,0xff,0xff,0x7b]
+          vfpclasspdq $0x7b,-1032(%rdx){1to4}, %k4
+
+// CHECK: vfpclassps $171, %xmm20, %k4
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x08,0x66,0xe4,0xab]
+          vfpclassps $0xab, %xmm20, %k4
+
+// CHECK: vfpclassps $171, %xmm20, %k4 {%k5}
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x0d,0x66,0xe4,0xab]
+          vfpclassps $0xab, %xmm20, %k4 {%k5}
+
+// CHECK: vfpclassps $123,  %xmm20, %k4
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x08,0x66,0xe4,0x7b]
+          vfpclassps $0x7b, %xmm20, %k4
+
+// CHECK: vfpclasspsx $123, (%rcx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x08,0x66,0x21,0x7b]
+          vfpclasspsx $0x7b,(%rcx), %k4
+
+// CHECK: vfpclasspsx $123, 291(%rax,%r14,8), %k4
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x08,0x66,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vfpclasspsx $0x7b,291(%rax,%r14,8), %k4
+
+// CHECK: vfpclasspsl $123, (%rcx){1to4}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x18,0x66,0x21,0x7b]
+          vfpclasspsl $0x7b,(%rcx){1to4}, %k4
+
+// CHECK: vfpclasspsx $123, 2032(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x08,0x66,0x62,0x7f,0x7b]
+          vfpclasspsx $0x7b,2032(%rdx), %k4
+
+// CHECK: vfpclasspsx $123, 2048(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x08,0x66,0xa2,0x00,0x08,0x00,0x00,0x7b]
+          vfpclasspsx $0x7b,2048(%rdx), %k4
+
+// CHECK: vfpclasspsx $123, -2048(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x08,0x66,0x62,0x80,0x7b]
+          vfpclasspsx $0x7b,-2048(%rdx), %k4
+
+// CHECK: vfpclasspsx $123, -2064(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x08,0x66,0xa2,0xf0,0xf7,0xff,0xff,0x7b]
+          vfpclasspsx $0x7b,-2064(%rdx), %k4
+
+// CHECK: vfpclasspsl $123, 508(%rdx){1to4}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x18,0x66,0x62,0x7f,0x7b]
+          vfpclasspsl $0x7b,508(%rdx){1to4}, %k4
+
+// CHECK: vfpclasspsl $123, 512(%rdx){1to4}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x18,0x66,0xa2,0x00,0x02,0x00,0x00,0x7b]
+          vfpclasspsl $0x7b,512(%rdx){1to4}, %k4
+
+// CHECK: vfpclasspsl $123, -512(%rdx){1to4}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x18,0x66,0x62,0x80,0x7b]
+          vfpclasspsl $0x7b,-512(%rdx){1to4}, %k4
+
+// CHECK: vfpclasspsl $123, -516(%rdx){1to4}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x18,0x66,0xa2,0xfc,0xfd,0xff,0xff,0x7b]
+          vfpclasspsl $0x7b,-516(%rdx){1to4}, %k4
+
+// CHECK: vfpclassps $171, %ymm17, %k4
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x28,0x66,0xe1,0xab]
+          vfpclassps $0xab, %ymm17, %k4
+
+// CHECK: vfpclassps $171, %ymm17, %k4 {%k5}
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x2d,0x66,0xe1,0xab]
+          vfpclassps $0xab, %ymm17, %k4 {%k5}
+
+// CHECK: vfpclassps $123,  %ymm17, %k4
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x28,0x66,0xe1,0x7b]
+          vfpclassps $0x7b, %ymm17, %k4
+
+// CHECK: vfpclasspsy $123, (%rcx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x28,0x66,0x21,0x7b]
+          vfpclasspsy $0x7b,(%rcx), %k4
+
+// CHECK: vfpclasspsy $123, 291(%rax,%r14,8), %k4
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x28,0x66,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vfpclasspsy $0x7b,291(%rax,%r14,8), %k4
+
+// CHECK: vfpclasspsl $123, (%rcx){1to8}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x38,0x66,0x21,0x7b]
+          vfpclasspsl $0x7b,(%rcx){1to8}, %k4
+
+// CHECK: vfpclasspsy $123, 4064(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x28,0x66,0x62,0x7f,0x7b]
+          vfpclasspsy $0x7b,4064(%rdx), %k4
+
+// CHECK: vfpclasspsy $123, 4096(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x28,0x66,0xa2,0x00,0x10,0x00,0x00,0x7b]
+          vfpclasspsy $0x7b,4096(%rdx), %k4
+
+// CHECK: vfpclasspsy $123, -4096(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x28,0x66,0x62,0x80,0x7b]
+          vfpclasspsy $0x7b,-4096(%rdx), %k4
+
+// CHECK: vfpclasspsy $123, -4128(%rdx), %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x28,0x66,0xa2,0xe0,0xef,0xff,0xff,0x7b]
+          vfpclasspsy $0x7b,-4128(%rdx), %k4
+
+// CHECK: vfpclasspsl $123, 508(%rdx){1to8}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x38,0x66,0x62,0x7f,0x7b]
+          vfpclasspsl $0x7b,508(%rdx){1to8}, %k4
+
+// CHECK: vfpclasspsl $123, 512(%rdx){1to8}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x38,0x66,0xa2,0x00,0x02,0x00,0x00,0x7b]
+          vfpclasspsl $0x7b,512(%rdx){1to8}, %k4
+
+// CHECK: vfpclasspsl $123, -512(%rdx){1to8}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x38,0x66,0x62,0x80,0x7b]
+          vfpclasspsl $0x7b,-512(%rdx){1to8}, %k4
+
+// CHECK: vfpclasspsl $123, -516(%rdx){1to8}, %k4
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x38,0x66,0xa2,0xfc,0xfd,0xff,0xff,0x7b]
+          vfpclasspsl $0x7b,-516(%rdx){1to8}, %k4
+
+// CHECK: vfpclasspd $171, %xmm26, %k3
+// CHECK:  encoding: [0x62,0x93,0xfd,0x08,0x66,0xda,0xab]
+          vfpclasspd $0xab, %xmm26, %k3
+
+// CHECK: vfpclasspd $171, %xmm26, %k3 {%k5}
+// CHECK:  encoding: [0x62,0x93,0xfd,0x0d,0x66,0xda,0xab]
+          vfpclasspd $0xab, %xmm26, %k3 {%k5}
+
+// CHECK: vfpclasspd $123,  %xmm26, %k3
+// CHECK:  encoding: [0x62,0x93,0xfd,0x08,0x66,0xda,0x7b]
+          vfpclasspd $0x7b, %xmm26, %k3
+
+// CHECK: vfpclasspdx $123, (%rcx), %k3
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x08,0x66,0x19,0x7b]
+          vfpclasspdx $0x7b,(%rcx), %k3
+
+// CHECK: vfpclasspdx $123, 4660(%rax,%r14,8), %k3
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x08,0x66,0x9c,0xf0,0x34,0x12,0x00,0x00,0x7b]
+          vfpclasspdx $0x7b,4660(%rax,%r14,8), %k3
+
+// CHECK: vfpclasspdq $123, (%rcx){1to2}, %k3
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x18,0x66,0x19,0x7b]
+          vfpclasspdq $0x7b,(%rcx){1to2}, %k3
+
+// CHECK: vfpclasspdx $123, 2032(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x08,0x66,0x5a,0x7f,0x7b]
+          vfpclasspdx $0x7b,2032(%rdx), %k3
+
+// CHECK: vfpclasspdx $123, 2048(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x08,0x66,0x9a,0x00,0x08,0x00,0x00,0x7b]
+          vfpclasspdx $0x7b,2048(%rdx), %k3
+
+// CHECK: vfpclasspdx $123, -2048(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x08,0x66,0x5a,0x80,0x7b]
+          vfpclasspdx $0x7b,-2048(%rdx), %k3
+
+// CHECK: vfpclasspdx $123, -2064(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x08,0x66,0x9a,0xf0,0xf7,0xff,0xff,0x7b]
+          vfpclasspdx $0x7b,-2064(%rdx), %k3
+
+// CHECK: vfpclasspdq $123, 1016(%rdx){1to2}, %k3
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x18,0x66,0x5a,0x7f,0x7b]
+          vfpclasspdq $0x7b,1016(%rdx){1to2}, %k3
+
+// CHECK: vfpclasspdq $123, 1024(%rdx){1to2}, %k3
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x18,0x66,0x9a,0x00,0x04,0x00,0x00,0x7b]
+          vfpclasspdq $0x7b,1024(%rdx){1to2}, %k3
+
+// CHECK: vfpclasspdq $123, -1024(%rdx){1to2}, %k3
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x18,0x66,0x5a,0x80,0x7b]
+          vfpclasspdq $0x7b,-1024(%rdx){1to2}, %k3
+
+// CHECK: vfpclasspdq $123, -1032(%rdx){1to2}, %k3
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x18,0x66,0x9a,0xf8,0xfb,0xff,0xff,0x7b]
+          vfpclasspdq $0x7b,-1032(%rdx){1to2}, %k3
+
+// CHECK: vfpclasspd $171, %ymm26, %k2
+// CHECK:  encoding: [0x62,0x93,0xfd,0x28,0x66,0xd2,0xab]
+          vfpclasspd $0xab, %ymm26, %k2
+
+// CHECK: vfpclasspd $171, %ymm26, %k2 {%k6}
+// CHECK:  encoding: [0x62,0x93,0xfd,0x2e,0x66,0xd2,0xab]
+          vfpclasspd $0xab, %ymm26, %k2 {%k6}
+
+// CHECK: vfpclasspd $123,  %ymm26, %k2
+// CHECK:  encoding: [0x62,0x93,0xfd,0x28,0x66,0xd2,0x7b]
+          vfpclasspd $0x7b, %ymm26, %k2
+
+// CHECK: vfpclasspdy $123, (%rcx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x28,0x66,0x11,0x7b]
+          vfpclasspdy $0x7b,(%rcx), %k2
+
+// CHECK: vfpclasspdy $123, 4660(%rax,%r14,8), %k2
+// CHECK:  encoding: [0x62,0xb3,0xfd,0x28,0x66,0x94,0xf0,0x34,0x12,0x00,0x00,0x7b]
+          vfpclasspdy $0x7b,4660(%rax,%r14,8), %k2
+
+// CHECK: vfpclasspdq $123, (%rcx){1to4}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x38,0x66,0x11,0x7b]
+          vfpclasspdq $0x7b,(%rcx){1to4}, %k2
+
+// CHECK: vfpclasspdy $123, 4064(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x28,0x66,0x52,0x7f,0x7b]
+          vfpclasspdy $0x7b,4064(%rdx), %k2
+
+// CHECK: vfpclasspdy $123, 4096(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x28,0x66,0x92,0x00,0x10,0x00,0x00,0x7b]
+          vfpclasspdy $0x7b,4096(%rdx), %k2
+
+// CHECK: vfpclasspdy $123, -4096(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x28,0x66,0x52,0x80,0x7b]
+          vfpclasspdy $0x7b,-4096(%rdx), %k2
+
+// CHECK: vfpclasspdy $123, -4128(%rdx), %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x28,0x66,0x92,0xe0,0xef,0xff,0xff,0x7b]
+          vfpclasspdy $0x7b,-4128(%rdx), %k2
+
+// CHECK: vfpclasspdq $123, 1016(%rdx){1to4}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x38,0x66,0x52,0x7f,0x7b]
+          vfpclasspdq $0x7b,1016(%rdx){1to4}, %k2
+
+// CHECK: vfpclasspdq $123, 1024(%rdx){1to4}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x38,0x66,0x92,0x00,0x04,0x00,0x00,0x7b]
+          vfpclasspdq $0x7b,1024(%rdx){1to4}, %k2
+
+// CHECK: vfpclasspdq $123, -1024(%rdx){1to4}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x38,0x66,0x52,0x80,0x7b]
+          vfpclasspdq $0x7b,-1024(%rdx){1to4}, %k2
+
+// CHECK: vfpclasspdq $123, -1032(%rdx){1to4}, %k2
+// CHECK:  encoding: [0x62,0xf3,0xfd,0x38,0x66,0x92,0xf8,0xfb,0xff,0xff,0x7b]
+          vfpclasspdq $0x7b,-1032(%rdx){1to4}, %k2
+
+// CHECK: vfpclassps $171, %xmm29, %k3
+// CHECK:  encoding: [0x62,0x93,0x7d,0x08,0x66,0xdd,0xab]
+          vfpclassps $0xab, %xmm29, %k3
+
+// CHECK: vfpclassps $171, %xmm29, %k3 {%k6}
+// CHECK:  encoding: [0x62,0x93,0x7d,0x0e,0x66,0xdd,0xab]
+          vfpclassps $0xab, %xmm29, %k3 {%k6}
+
+// CHECK: vfpclassps $123,  %xmm29, %k3
+// CHECK:  encoding: [0x62,0x93,0x7d,0x08,0x66,0xdd,0x7b]
+          vfpclassps $0x7b, %xmm29, %k3
+
+// CHECK: vfpclasspsx $123, (%rcx), %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x08,0x66,0x19,0x7b]
+          vfpclasspsx $0x7b,(%rcx), %k3
+
+// CHECK: vfpclasspsx $123, 4660(%rax,%r14,8), %k3
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x08,0x66,0x9c,0xf0,0x34,0x12,0x00,0x00,0x7b]
+          vfpclasspsx $0x7b,4660(%rax,%r14,8), %k3
+
+// CHECK: vfpclasspsl $123, (%rcx){1to4}, %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x18,0x66,0x19,0x7b]
+          vfpclasspsl $0x7b,(%rcx){1to4}, %k3
+
+// CHECK: vfpclasspsx $123, 2032(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x08,0x66,0x5a,0x7f,0x7b]
+          vfpclasspsx $0x7b,2032(%rdx), %k3
+
+// CHECK: vfpclasspsx $123, 2048(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x08,0x66,0x9a,0x00,0x08,0x00,0x00,0x7b]
+          vfpclasspsx $0x7b,2048(%rdx), %k3
+
+// CHECK: vfpclasspsx $123, -2048(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x08,0x66,0x5a,0x80,0x7b]
+          vfpclasspsx $0x7b,-2048(%rdx), %k3
+
+// CHECK: vfpclasspsx $123, -2064(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x08,0x66,0x9a,0xf0,0xf7,0xff,0xff,0x7b]
+          vfpclasspsx $0x7b,-2064(%rdx), %k3
+
+// CHECK: vfpclasspsl $123, 508(%rdx){1to4}, %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x18,0x66,0x5a,0x7f,0x7b]
+          vfpclasspsl $0x7b,508(%rdx){1to4}, %k3
+
+// CHECK: vfpclasspsl $123, 512(%rdx){1to4}, %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x18,0x66,0x9a,0x00,0x02,0x00,0x00,0x7b]
+          vfpclasspsl $0x7b,512(%rdx){1to4}, %k3
+
+// CHECK: vfpclasspsl $123, -512(%rdx){1to4}, %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x18,0x66,0x5a,0x80,0x7b]
+          vfpclasspsl $0x7b,-512(%rdx){1to4}, %k3
+
+// CHECK: vfpclasspsl $123, -516(%rdx){1to4}, %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x18,0x66,0x9a,0xfc,0xfd,0xff,0xff,0x7b]
+          vfpclasspsl $0x7b,-516(%rdx){1to4}, %k3
+
+// CHECK: vfpclassps $171, %ymm19, %k3
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x28,0x66,0xdb,0xab]
+          vfpclassps $0xab, %ymm19, %k3
+
+// CHECK: vfpclassps $171, %ymm19, %k3 {%k3}
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x2b,0x66,0xdb,0xab]
+          vfpclassps $0xab, %ymm19, %k3 {%k3}
+
+// CHECK: vfpclassps $123,  %ymm19, %k3
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x28,0x66,0xdb,0x7b]
+          vfpclassps $0x7b, %ymm19, %k3
+
+// CHECK: vfpclasspsy $123, (%rcx), %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x28,0x66,0x19,0x7b]
+          vfpclasspsy $0x7b,(%rcx), %k3
+
+// CHECK: vfpclasspsy $123, 4660(%rax,%r14,8), %k3
+// CHECK:  encoding: [0x62,0xb3,0x7d,0x28,0x66,0x9c,0xf0,0x34,0x12,0x00,0x00,0x7b]
+          vfpclasspsy $0x7b,4660(%rax,%r14,8), %k3
+
+// CHECK: vfpclasspsl $123, (%rcx){1to8}, %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x38,0x66,0x19,0x7b]
+          vfpclasspsl $0x7b,(%rcx){1to8}, %k3
+
+// CHECK: vfpclasspsy $123, 4064(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x28,0x66,0x5a,0x7f,0x7b]
+          vfpclasspsy $0x7b,4064(%rdx), %k3
+
+// CHECK: vfpclasspsy $123, 4096(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x28,0x66,0x9a,0x00,0x10,0x00,0x00,0x7b]
+          vfpclasspsy $0x7b,4096(%rdx), %k3
+
+// CHECK: vfpclasspsy $123, -4096(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x28,0x66,0x5a,0x80,0x7b]
+          vfpclasspsy $0x7b,-4096(%rdx), %k3
+
+// CHECK: vfpclasspsy $123, -4128(%rdx), %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x28,0x66,0x9a,0xe0,0xef,0xff,0xff,0x7b]
+          vfpclasspsy $0x7b,-4128(%rdx), %k3
+
+// CHECK: vfpclasspsl $123, 508(%rdx){1to8}, %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x38,0x66,0x5a,0x7f,0x7b]
+          vfpclasspsl $0x7b,508(%rdx){1to8}, %k3
+
+// CHECK: vfpclasspsl $123, 512(%rdx){1to8}, %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x38,0x66,0x9a,0x00,0x02,0x00,0x00,0x7b]
+          vfpclasspsl $0x7b,512(%rdx){1to8}, %k3
+
+// CHECK: vfpclasspsl $123, -512(%rdx){1to8}, %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x38,0x66,0x5a,0x80,0x7b]
+          vfpclasspsl $0x7b,-512(%rdx){1to8}, %k3
+
+// CHECK: vfpclasspsl $123, -516(%rdx){1to8}, %k3
+// CHECK:  encoding: [0x62,0xf3,0x7d,0x38,0x66,0x9a,0xfc,0xfd,0xff,0xff,0x7b]
+          vfpclasspsl $0x7b,-516(%rdx){1to8}, %k3