UPSTREAM: drm: bridge: dw-hdmi: Rename CONF0 SPARECTRL bit to SVSRET

The bit is documented in a Rockchip BSP as

 #define m_SVSRET_SIG		(1 << 5) /* depend on PHY_MHL_COMB0=1 */

This is confirmed by a Renesas platform, which uses a 2.0 DWC HDMI TX as
the RK3288. Rename the bit accordingly.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-13-laurent.pinchart+renesas@ideasonboard.com
Change-Id: Ib9cd213b8bc956169cf3d3e13415d99a4c65717c
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry pick from f4104e8fe12c173fbba5e7e30b846e09eeb5bfbd)

diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c
index a481fc461327272cb3a28200f70f0d52eed0e5bb..901477a79c8b598140c5699e9976be6df01a724f 100644 (file)
--- a/drivers/gpu/drm/bridge/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
@@ -1148,11 +1148,11 @@ static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable)
                         HDMI_PHY_CONF0_ENTMDS_MASK);
 }
 
-static void dw_hdmi_phy_enable_spare(struct dw_hdmi *hdmi, u8 enable)
+static void dw_hdmi_phy_enable_svsret(struct dw_hdmi *hdmi, u8 enable)
 {
        hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
-                        HDMI_PHY_CONF0_SPARECTRL_OFFSET,
-                        HDMI_PHY_CONF0_SPARECTRL_MASK);
+                        HDMI_PHY_CONF0_SVSRET_OFFSET,
+                        HDMI_PHY_CONF0_SVSRET_MASK);
 }
 
 static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable)
@@ -1292,7 +1292,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon)
        dw_hdmi_phy_gen2_pddq(hdmi, 0);
 
        if (is_rockchip(hdmi->dev_type))
-               dw_hdmi_phy_enable_spare(hdmi, 1);
+               dw_hdmi_phy_enable_svsret(hdmi, 1);
 
        /* Wait for PHY PLL lock */
        msec = 5;

diff --git a/drivers/gpu/drm/bridge/dw-hdmi.h b/drivers/gpu/drm/bridge/dw-hdmi.h
index 2517cb38c0ba641c882358be3a6c78b927f7cf2f..f8e25c926e62862adb2367ee7bd33f575ed307b9 100644 (file)
--- a/drivers/gpu/drm/bridge/dw-hdmi.h
+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
@@ -874,8 +874,8 @@ enum {
        HDMI_PHY_CONF0_PDZ_OFFSET = 7,
        HDMI_PHY_CONF0_ENTMDS_MASK = 0x40,
        HDMI_PHY_CONF0_ENTMDS_OFFSET = 6,
-       HDMI_PHY_CONF0_SPARECTRL_MASK = 0x20,
-       HDMI_PHY_CONF0_SPARECTRL_OFFSET = 5,
+       HDMI_PHY_CONF0_SVSRET_MASK = 0x20,
+       HDMI_PHY_CONF0_SVSRET_OFFSET = 5,
        HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10,
        HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4,
        HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8,