fix bug of low-speed device support in usb1.1 host

diff --git a/drivers/usb/dwc_otg/Kconfig b/drivers/usb/dwc_otg/Kconfig
index 5116703c1a3a886f6cb78590c7554f14af0d239a..a95b9a3e368da56cbeb12ee440061e481b73e104 100755 (executable)
--- a/drivers/usb/dwc_otg/Kconfig
+++ b/drivers/usb/dwc_otg/Kconfig
@@ -57,7 +57,7 @@ config DWC_OTG_BOTH_HOST_SLAVE
 endchoice
 
 choice 
-       bool "    Controller default status"
+       bool "Controller default status"
        depends on DWC_OTG_BOTH_HOST_SLAVE
        default DWC_OTG_DEFAULT_ID
 

diff --git a/drivers/usb/dwc_otg/dwc_otg_driver.c b/drivers/usb/dwc_otg/dwc_otg_driver.c
index 1547f6b8a29a13bab4111b7c6e02802d3f1e76f4..6a63862a181aefd982b595b1800055c7cfc9f0a4 100755 (executable)
--- a/drivers/usb/dwc_otg/dwc_otg_driver.c
+++ b/drivers/usb/dwc_otg/dwc_otg_driver.c
@@ -161,7 +161,7 @@ static dwc_otg_core_params_t host11_module_params = {
        .dma_enable = -1,
        .dma_burst_size = -1,
        .speed = -1,
-       .host_support_fs_ls_low_power = -1,
+       .host_support_fs_ls_low_power = 1,
        .host_ls_low_power_phy_clk = -1,
        .enable_dynamic_fifo = -1,
        .data_fifo_size = -1,

diff --git a/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c b/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c
index 74a41c9566b4f211a34ee8fb480c0ef60d3d552a..d0b892a197171ccef0698ff4187b00b381c96c01 100755 (executable)
--- a/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c
+++ b/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c
@@ -373,6 +373,8 @@ int32_t dwc_otg_hcd_handle_port_intr (dwc_otg_hcd_t *_dwc_otg_hcd)
 
                        /* Check if we need to adjust the PHY clock speed for
                         * low power and adjust it */
+                       /*yk @rk 20110525*/
+                       /*fix bug usb host 1.1 with low-speed*/
                        if (params->host_support_fs_ls_low_power)
                        {
                                gusbcfg_data_t usbcfg;
@@ -386,12 +388,14 @@ int32_t dwc_otg_hcd_handle_port_intr (dwc_otg_hcd_t *_dwc_otg_hcd)
                                         * Low power 
                                         */
                                        hcfg_data_t hcfg;
+                                       #if 0
                                        if (usbcfg.b.phylpwrclksel == 0) {
                                                /* Set PHY low power clock select for FS/LS devices */
                                                usbcfg.b.phylpwrclksel = 1;
                                                dwc_write_reg32(&global_regs->gusbcfg, usbcfg.d32);
                                                do_reset = 1;
                                        }
+                                       #endif
 
                                        hcfg.d32 = dwc_read_reg32(&host_if->host_global_regs->hcfg);
 
@@ -405,6 +409,7 @@ int32_t dwc_otg_hcd_handle_port_intr (dwc_otg_hcd_t *_dwc_otg_hcd)
                                                        hcfg.b.fslspclksel = DWC_HCFG_6_MHZ;
                                                        dwc_write_reg32(&host_if->host_global_regs->hcfg,
                                                                        hcfg.d32);
+                            dwc_write_reg32(&host_if->host_global_regs->hfir, 0x1770);
                                                        do_reset = 1;
                                                }
                                        }
@@ -415,6 +420,7 @@ int32_t dwc_otg_hcd_handle_port_intr (dwc_otg_hcd_t *_dwc_otg_hcd)
                                                        hcfg.b.fslspclksel = DWC_HCFG_48_MHZ;
                                                        dwc_write_reg32(&host_if->host_global_regs->hcfg,
                                                                        hcfg.d32);
+                            dwc_write_reg32(&host_if->host_global_regs->hfir, 0xea60);
                                                        do_reset = 1;
                                                }
                                        }