RK3188:ddr_clock select GPLL_2_div if ddr_freq big then 250MHz,

  only use for DPLL bad and ddr_clock must select GPLL(800MHz-1000MHz).

diff --git a/arch/arm/mach-rk30/ddr.c b/arch/arm/mach-rk30/ddr.c
old mode 100644 (file)
new mode 100755 (executable)
index 4a15f4c..d0cd1aa
--- a/arch/arm/mach-rk30/ddr.c
+++ b/arch/arm/mach-rk30/ddr.c
@@ -3717,7 +3717,7 @@ uint32_t ddr_change_freq(uint32_t nMHz)
         }
         else if(gpllvaluel > 800)    //GPLL:800MHz-1000MHz
         {
-            if(nMHz > 300)
+            if(nMHz > 250)
                 ddr_select_gpll_div=2;    //DDR_CLCOK:400MHz-500MHz
             else
                 ddr_select_gpll_div=4;    //DDR_CLCOK:200MHz-250MHz