if (rga_service.enable)\r
return;\r
\r
- clk_enable(drvdata->aclk_rga);\r
- clk_enable(drvdata->hclk_rga);\r
- clk_enable(drvdata->pd_rga);\r
+ clk_prepare_enable(drvdata->aclk_rga);\r
+ clk_prepare_enable(drvdata->hclk_rga);\r
+ //clk_prepare_enable(drvdata->pd_rga);\r
wake_lock(&drvdata->wake_lock);\r
rga_service.enable = true;\r
}\r
rga_dump();\r
}\r
\r
- clk_disable(drvdata->pd_rga);\r
- clk_disable(drvdata->aclk_rga);\r
- clk_disable(drvdata->hclk_rga);\r
+ //clk_disable_unprepare(drvdata->pd_rga);\r
+ clk_disable_unprepare(drvdata->aclk_rga);\r
+ clk_disable_unprepare(drvdata->hclk_rga);\r
wake_unlock(&drvdata->wake_lock);\r
rga_service.enable = false;\r
}\r
};\r
\r
\r
-\r
-static const struct of_device_id rockchip_rga_of_match[] = {\r
- { .compatible = "rockchip,rga", .data = NULL, },\r
+#if defined(CONFIG_OF)\r
+static const struct of_device_id rockchip_rga_dt_ids[] = {\r
+ { .compatible = "rockchip,rga", },\r
{},\r
};\r
+#endif\r
\r
static int rga_drv_probe(struct platform_device *pdev)\r
{\r
struct device_node *np = pdev->dev.of_node;\r
int ret = 0;\r
\r
- INIT_LIST_HEAD(&rga_service.waiting);\r
- INIT_LIST_HEAD(&rga_service.running);\r
- INIT_LIST_HEAD(&rga_service.done);\r
- INIT_LIST_HEAD(&rga_service.session);\r
mutex_init(&rga_service.lock);\r
mutex_init(&rga_service.mutex);\r
atomic_set(&rga_service.total_running, 0);\r
data->aclk_rga = devm_clk_get(&pdev->dev, "aclk_rga");\r
data->hclk_rga = devm_clk_get(&pdev->dev, "hclk_rga");\r
\r
- clk_prepare_enable(data->aclk_rga);\r
- clk_prepare_enable(data->hclk_rga);\r
-\r
/* map the registers */\r
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);\r
data->rga_base = devm_ioremap_resource(&pdev->dev, res);\r
free_irq(data->irq, &data->miscdev);\r
iounmap((void __iomem *)(data->rga_base));\r
\r
- clk_disable_unprepare(data->aclk_rga);\r
- clk_disable_unprepare(data->hclk_rga);\r
-\r
//clk_put(data->pd_rga);\r
- clk_put(data->aclk_rga);\r
- clk_put(data->hclk_rga);\r
+ devm_clk_put(&pdev->dev, data->aclk_rga);\r
+ devm_clk_put(&pdev->dev, data->hclk_rga);\r
\r
//kfree(data);\r
return 0;\r
.driver = {\r
.owner = THIS_MODULE,\r
.name = "rga",\r
+ .of_match_table = of_match_ptr(rockchip_rga_dt_ids),\r
},\r
};\r
\r
INIT_LIST_HEAD(&rga_session_global.waiting);\r
INIT_LIST_HEAD(&rga_session_global.running);\r
INIT_LIST_HEAD(&rga_session_global.list_session);\r
+\r
+ INIT_LIST_HEAD(&rga_service.waiting);\r
+ INIT_LIST_HEAD(&rga_service.running);\r
+ INIT_LIST_HEAD(&rga_service.done);\r
+ INIT_LIST_HEAD(&rga_service.session);\r
+\r
init_waitqueue_head(&rga_session_global.wait);\r
//mutex_lock(&rga_service.lock);\r
list_add_tail(&rga_session_global.list_session, &rga_service.session);\r
atomic_set(&rga_session_global.num_done, 0);\r
}\r
\r
+\r
+\r
#if RGA_TEST_CASE\r
rga_test_0();\r
#endif\r
return;\r
\r
//clk_enable(rga2_drvdata->rga2);\r
- clk_enable(rga2_drvdata->aclk_rga2);\r
- clk_enable(rga2_drvdata->hclk_rga2);\r
+ clk_prepare_enable(rga2_drvdata->aclk_rga2);\r
+ clk_prepare_enable(rga2_drvdata->hclk_rga2);\r
//clk_enable(rga2_drvdata->pd_rga2);\r
wake_lock(&rga2_drvdata->wake_lock);\r
rga2_service.enable = true;\r
\r
//clk_disable(rga2_drvdata->pd_rga2);\r
//clk_disable(rga2_drvdata->rga2);\r
- clk_disable(rga2_drvdata->aclk_rga2);\r
- clk_disable(rga2_drvdata->hclk_rga2);\r
+ clk_disable_unprepare(rga2_drvdata->aclk_rga2);\r
+ clk_disable_unprepare(rga2_drvdata->hclk_rga2);\r
wake_unlock(&rga2_drvdata->wake_lock);\r
rga2_service.enable = false;\r
}\r
struct device_node *np = pdev->dev.of_node;\r
int ret = 0;\r
\r
- INIT_LIST_HEAD(&rga2_service.waiting);\r
- INIT_LIST_HEAD(&rga2_service.running);\r
- INIT_LIST_HEAD(&rga2_service.done);\r
- INIT_LIST_HEAD(&rga2_service.session);\r
mutex_init(&rga2_service.lock);\r
mutex_init(&rga2_service.mutex);\r
atomic_set(&rga2_service.total_running, 0);\r
data->aclk_rga = devm_clk_get(&pdev->dev, "aclk_rga");\r
data->hclk_rga = devm_clk_get(&pdev->dev, "hclk_rga");\r
\r
- clk_prepare_enable(data->aclk_rga);\r
- clk_prepare_enable(data->hclk_rga);\r
-\r
/* map the registers */\r
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);\r
data->rga_base = devm_ioremap_resource(&pdev->dev, res);\r
free_irq(data->irq, &data->miscdev);\r
iounmap((void __iomem *)(data->rga_base));\r
\r
- clk_disable_unprepare(data->aclk_rga);\r
- clk_disable_unprepare(data->hclk_rga);\r
-\r
//clk_put(data->pd_rga2);\r
//clk_put(data->rga2);\r
- clk_put(data->aclk_rga2);\r
- clk_put(data->hclk_rga2);\r
-\r
+ devm_clk_put(&pdev->dev, data->aclk_rga2);\r
+ devm_clk_put(&pdev->dev, data->hclk_rga2);\r
\r
kfree(data);\r
return 0;\r
INIT_LIST_HEAD(&rga2_session_global.waiting);\r
INIT_LIST_HEAD(&rga2_session_global.running);\r
INIT_LIST_HEAD(&rga2_session_global.list_session);\r
+\r
+ INIT_LIST_HEAD(&rga2_service.waiting);\r
+ INIT_LIST_HEAD(&rga2_service.running);\r
+ INIT_LIST_HEAD(&rga2_service.done);\r
+ INIT_LIST_HEAD(&rga2_service.session);\r
init_waitqueue_head(&rga2_session_global.wait);\r
//mutex_lock(&rga_service.lock);\r
list_add_tail(&rga2_session_global.list_session, &rga2_service.session);\r