drm/i915: We implement WaDisableL3CacheAging:vlv

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index cf7f15ffd148b7a2d755c31e8110b3bb4c521c96..fa256fb83a8b20e98ebe1e7a2ec3b17ee3549a69 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4942,8 +4942,9 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
        I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
                   GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
 
-       /* WaApplyL3ControlAndL3ChickenMode:vlv */
+       /* WaDisableL3CacheAging:vlv */
        I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS);
+       /* WaApplyL3ControlAndL3ChickenMode:vlv */
        I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE);
 
        /* WaForceL3Serialization:vlv */