[ARM] tegra: stingray: pull up on TEGRA_PINGROUP_SDIO1 (UARTE)
authorprabhu annabathula <prabhu.annabathula@motorola.com>
Mon, 25 Oct 2010 18:31:59 +0000 (13:31 -0500)
committerColin Cross <ccross@android.com>
Wed, 27 Oct 2010 03:08:20 +0000 (20:08 -0700)
UARTE used by GPS is changed to  4-wire connect between
Broadcom chip and Tegra from P3 hardwares.
uart5_cts_n is not connected in hardware versions < P3, pull down
on cts line pin to keep it low in hardware versions < P3.

Signed-off-by: prabhu annabathula <prabhu.annabathula@motorola.com>
arch/arm/mach-tegra/board-stingray-gps.c
arch/arm/mach-tegra/board-stingray-pinmux.c

index abad68d8fe16e532855eff749e72a2d69d5731ae..80c8811638db1e7341343830283ba0fdd280ebf8 100755 (executable)
 #include <linux/gps-gpio-brcm4750.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include "board-stingray.h"
 #include "gpio-names.h"
 
 #define STINGRAY_GPS_RESET     TEGRA_GPIO_PH0
 #define STINGRAY_GPS_STANDBY  TEGRA_GPIO_PH1
+#define STINGRAY_GPS_UART_CTS  TEGRA_GPIO_PY6
 
 static void stingray_gps_reset_gpio(unsigned int gpio_val)
 {
@@ -52,6 +54,13 @@ static void stingray_gps_gpio_init(void)
        tegra_gpio_enable(STINGRAY_GPS_STANDBY);
        gpio_request(STINGRAY_GPS_STANDBY, "gps_stdby");
        gpio_direction_output(STINGRAY_GPS_STANDBY, 0);
+
+       if (stingray_revision() < STINGRAY_REVISION_P3) {
+               tegra_gpio_enable(STINGRAY_GPS_UART_CTS);
+               gpio_request(STINGRAY_GPS_UART_CTS, "uarte_cts");
+               gpio_direction_output(STINGRAY_GPS_UART_CTS, 0);
+               gpio_set_value(STINGRAY_GPS_UART_CTS, 0);
+       }
 }
 
 struct gps_gpio_brcm4750_platform_data stingray_gps_gpio_data = {
index 70f38d15c7fc52e0a1375f376177ac135440ab59..d3437bf6873939e6423da30a231436c7d750ce96 100644 (file)
@@ -109,7 +109,7 @@ static __initdata struct tegra_pingroup_config stingray_pinmux[] = {
        {TEGRA_PINGROUP_SDB,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SDC,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SDD,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},
-       {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_UARTE,         TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_UARTE,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SLXA,  TEGRA_MUX_SAFE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SLXC,  TEGRA_MUX_SAFE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SLXD,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},