; CHECK-NEXT: store volatile i1 %pop.cmp, i1* %c
}
-
-define i32 @cttz_simplify1(i32 %x) nounwind readnone ssp {
- %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false) ; <i32> [#uses=1]
- %shr3 = lshr i32 %tmp1, 5 ; <i32> [#uses=1]
+define i32 @cttz_simplify1a(i32 %x) nounwind readnone ssp {
+ %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
+ %shr3 = lshr i32 %tmp1, 5
ret i32 %shr3
-
-; CHECK: @cttz_simplify1
+
+; CHECK: @cttz_simplify1a
; CHECK: icmp eq i32 %x, 0
-; CHECK-NEXT: zext i1
+; CHECK-NEXT: zext i1
; CHECK-NEXT: ret i32
}
+define i32 @cttz_simplify1b(i32 %x) nounwind readnone ssp {
+ %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true)
+ %shr3 = lshr i32 %tmp1, 5
+ ret i32 %shr3
+; CHECK: @cttz_simplify1b
+; CHECK-NEXT: ret i32 0
+}