[SCSI] qla4xxx: remove unwanted check for bad spd
authorVikas Chaudhary <vikas.chaudhary@qlogic.com>
Thu, 7 Oct 2010 05:51:09 +0000 (22:51 -0700)
committerJames Bottomley <James.Bottomley@suse.de>
Mon, 25 Oct 2010 19:54:16 +0000 (14:54 -0500)
Signed-off-by: Vikas Chaudhary <vikas.chaudhary@qlogic.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: Ravi Anand <ravi.anand@qlogic.com>
Reviewed-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
drivers/scsi/qla4xxx/ql4_nx.c
drivers/scsi/qla4xxx/ql4_nx.h

index 74582cb46a283478cd7830efc48b921fcd6b8249..474b10d713647ea8aafde7a9057a49450bcf99e9 100644 (file)
@@ -1081,21 +1081,6 @@ qla4_8xxx_pinit_from_rom(struct scsi_qla_host *ha, int verbose)
        return 0;
 }
 
-static int qla4_8xxx_check_for_bad_spd(struct scsi_qla_host *ha)
-{
-       u32 val = 0;
-       val = qla4_8xxx_rd_32(ha, BOOT_LOADER_DIMM_STATUS) ;
-       val &= QLA82XX_BOOT_LOADER_MN_ISSUE;
-       if (val & QLA82XX_PEG_TUNE_MN_SPD_ZEROED) {
-               printk("Memory DIMM SPD not programmed.  Assumed valid.\n");
-               return 1;
-       } else if (val) {
-               printk("Memory DIMM type incorrect.  Info:%08X.\n", val);
-               return 2;
-       }
-       return 0;
-}
-
 static int
 qla4_8xxx_load_from_flash(struct scsi_qla_host *ha, uint32_t image_start)
 {
@@ -1380,8 +1365,6 @@ static int qla4_8xxx_cmdpeg_ready(struct scsi_qla_host *ha, int pegtune_val)
 
                } while (--retries);
 
-               qla4_8xxx_check_for_bad_spd(ha);
-
                if (!retries) {
                        pegtune_val = qla4_8xxx_rd_32(ha,
                                QLA82XX_ROMUSB_GLB_PEGTUNE_DONE);
index 95f3060ad027b8479628d0dda11e5a018a5a4886..ff689bf530071a1978fe85bce5e56082b2570e8b 100644 (file)
@@ -24,7 +24,6 @@
 
 #define CRB_CMDPEG_STATE               QLA82XX_REG(0x50)
 #define CRB_RCVPEG_STATE               QLA82XX_REG(0x13c)
-#define BOOT_LOADER_DIMM_STATUS                QLA82XX_REG(0x54)
 #define CRB_DMA_SHIFT                  QLA82XX_REG(0xcc)
 
 #define QLA82XX_HW_H0_CH_HUB_ADR       0x05
 # define QLA82XX_CAM_RAM_BASE  (QLA82XX_CRB_CAM + 0x02000)
 # define QLA82XX_CAM_RAM(reg)  (QLA82XX_CAM_RAM_BASE + (reg))
 
-#define QLA82XX_PEG_TUNE_MN_SPD_ZEROED 0x80000000
-#define QLA82XX_BOOT_LOADER_MN_ISSUE   0xff00ffff
 #define QLA82XX_PORT_MODE_ADDR         (QLA82XX_CAM_RAM(0x24))
 #define QLA82XX_PEG_HALT_STATUS1       (QLA82XX_CAM_RAM(0xa8))
 #define QLA82XX_PEG_HALT_STATUS2       (QLA82XX_CAM_RAM(0xac))