rk30: i2c: update i2c drivers
authorkfx <kfx@rock-chips.com>
Fri, 23 Mar 2012 15:22:21 +0000 (23:22 +0800)
committerkfx <kfx@rock-chips.com>
Fri, 23 Mar 2012 15:22:21 +0000 (23:22 +0800)
arch/arm/mach-rk30/devices.c
drivers/i2c/busses/i2c-rk30-adapter.c

index 01c89729a1e21f34c1bc933b49fe71c4621f5ea9..43374f02851427d42783b7b7f1cf9293e1b9c674 100755 (executable)
@@ -336,34 +336,34 @@ static void __init rk30_init_uart(void)
 #ifdef CONFIG_I2C2_CONTROLLER_RK29
 #define I2C2_ADAP_TYPE  I2C_RK29_ADAP
 #define I2C2_START      RK30_I2C2_PHYS
-#define I2C2_END        RK30_I2C2_PHYS + SZ_4K - 1
+#define I2C2_END        RK30_I2C2_PHYS + SZ_8K - 1
 #endif
 #ifdef CONFIG_I2C2_CONTROLLER_RK30
 #define I2C2_ADAP_TYPE   I2C_RK30_ADAP
-#define I2C2_START      RK30_I2C2_PHYS + SZ_4K
-#define I2C2_END        RK30_I2C2_PHYS + SZ_8K - 1
+#define I2C2_START      RK30_I2C2_PHYS + SZ_8K
+#define I2C2_END        RK30_I2C2_PHYS + SZ_16K - 1
 #endif
 
 #ifdef CONFIG_I2C3_CONTROLLER_RK29
 #define I2C3_ADAP_TYPE  I2C_RK29_ADAP
 #define I2C3_START      RK30_I2C3_PHYS
-#define I2C3_END        RK30_I2C3_PHYS + SZ_4K - 1
+#define I2C3_END        RK30_I2C3_PHYS + SZ_8K - 1
 #endif
 #ifdef CONFIG_I2C3_CONTROLLER_RK30
 #define I2C3_ADAP_TYPE   I2C_RK30_ADAP
-#define I2C3_START      RK30_I2C3_PHYS + SZ_4K
-#define I2C3_END        RK30_I2C3_PHYS + SZ_8K - 1
+#define I2C3_START      RK30_I2C3_PHYS + SZ_8K
+#define I2C3_END        RK30_I2C3_PHYS + SZ_16K - 1
 #endif
 
 #ifdef CONFIG_I2C4_CONTROLLER_RK29
 #define I2C4_ADAP_TYPE  I2C_RK29_ADAP
 #define I2C4_START      RK30_I2C4_PHYS
-#define I2C4_END        RK30_I2C4_PHYS + SZ_4K - 1
+#define I2C4_END        RK30_I2C4_PHYS + SZ_8K - 1
 #endif
 #ifdef CONFIG_I2C4_CONTROLLER_RK30
 #define I2C4_ADAP_TYPE   I2C_RK30_ADAP
-#define I2C4_START      RK30_I2C4_PHYS + SZ_4K
-#define I2C4_END        RK30_I2C4_PHYS + SZ_8K - 1
+#define I2C4_START      RK30_I2C4_PHYS + SZ_8K
+#define I2C4_END        RK30_I2C4_PHYS + SZ_16K - 1
 #endif
 
 #ifdef CONFIG_I2C0_RK30
index ce3d821f939df70d006be6ded70b6b0ad8ab9773..c0e773cb827ef27a610a2a6f9fee3ac693f3b5bd 100755 (executable)
@@ -98,24 +98,33 @@ static inline void rk30_i2c_last_ack(struct rk30_i2c *i2c, int enable)
 {
     unsigned int p = readl(i2c->regs + I2C_CON);
 
+    p = rk30_set_bit(p, 0, I2C_START_BIT);
+    p = rk30_set_bit(p, 0, I2C_STOP_BIT);
     writel(rk30_set_bit(p, enable, I2C_LAST_ACK_BIT), i2c->regs + I2C_CON);
 }
 static inline void rk30_i2c_act2ack(struct rk30_i2c *i2c, int enable)
 {
     unsigned int p = readl(i2c->regs + I2C_CON);
 
+    p = rk30_set_bit(p, 0, I2C_START_BIT);
+    p = rk30_set_bit(p, 0, I2C_STOP_BIT);
     writel(rk30_set_bit(p, enable, I2C_ACT2ACK_BIT), i2c->regs + I2C_CON);
 }
 static inline void rk30_i2c_enable(struct rk30_i2c *i2c, int enable)
 {
     unsigned int p = readl(i2c->regs + I2C_CON);
 
+    p = rk30_set_bit(p, 0, I2C_START_BIT);
+    p = rk30_set_bit(p, 0, I2C_STOP_BIT);
+
     writel(rk30_set_bit(p, enable, I2C_EN_BIT), i2c->regs + I2C_CON);
 }
 static inline void rk30_i2c_set_mode(struct rk30_i2c *i2c)
 {
     unsigned int p = readl(i2c->regs + I2C_CON);
     
+    p = rk30_set_bit(p, 0, I2C_START_BIT);
+    p = rk30_set_bit(p, 0, I2C_STOP_BIT);
     writel(rk30_set_bits(p, i2c->mode, I2C_MOD_BIT, I2C_MOD_MASK), i2c->regs + I2C_CON);
 }
 static inline void rk30_i2c_disable_irq(struct rk30_i2c *i2c)
@@ -191,6 +200,7 @@ static void rk30_i2c_stop(struct rk30_i2c *i2c, int ret)
        if (ret)
                i2c->msg_idx = ret;
 
+        mdelay(10);
     i2c->state = STATE_STOP;
     rk30_i2c_send_stop(i2c);
 }
@@ -319,7 +329,7 @@ static irqreturn_t rk30_i2c_irq(int irq, void *dev_id)
     if(ipd & I2C_NAKRCVIPD) {
         writel(I2C_NAKRCVIPD, i2c->regs + I2C_IPD);
         rk30_i2c_stop(i2c, -EAGAIN);
-               dev_err(i2c->dev, "Addr[0x%02x] ack was not received\n", i2c->addr);
+               dev_dbg(i2c->dev, "Addr[0x%02x] ack was not received\n", i2c->addr);
         rk30_show_regs(i2c);
         goto out;
     }