ARM: tegra: parent sclk on pll_m_out1 so it can run @ 240Mhz
authorDima Zavin <dima@android.com>
Sat, 2 Oct 2010 03:01:42 +0000 (20:01 -0700)
committerColin Cross <ccross@android.com>
Wed, 6 Oct 2010 23:29:08 +0000 (16:29 -0700)
Since sclk no longer needs pll_p_out4, don't explicitly enable it.

Change-Id: I47debdd3402e02967f77ebd4c3b8c4594ece4083
Signed-off-by: Dima Zavin <dima@android.com>
arch/arm/mach-tegra/common.c

index d5852042123a2bafb4fa3367a4dce715a5887569..d8adca772d6bb1b633474513951ec9f2c48c65b0 100644 (file)
@@ -42,10 +42,10 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
        { "pll_p_out1", "pll_p",        28800000,       true },
        { "pll_p_out2", "pll_p",        48000000,       true },
        { "pll_p_out3", "pll_p",        72000000,       true },
-       { "pll_p_out4", "pll_p",        108000000,      true },
-       { "sclk",       "pll_p_out4",   108000000,      true },
-       { "hclk",       "sclk",         108000000,      true },
-       { "pclk",       "hclk",         54000000,       true },
+       { "pll_m_out1", "pll_m",        240000000,      true },
+       { "sclk",       "pll_m_out1",   240000000,      true },
+       { "hclk",       "sclk",         240000000,      true },
+       { "pclk",       "hclk",         120000000,      true },
        { "pll_u",      "clk_m",        480000000,      false },
        { "sdmmc1",     "pll_p",        48000000,       false},
        { "sdmmc2",     "pll_p",        48000000,       false},