#include "dwc_otg_pcd.h"
#include "dwc_otg_hcd.h"
+#include <mach/cru.h>
+
//#define DWC_DRIVER_VERSION "2.60a 22-NOV-2006"
//#define DWC_DRIVER_VERSION "2.70 2009-12-31"
#define DWC_DRIVER_VERSION "3.00 2010-12-12 rockchip"
memset(dwc_otg_device, 0, sizeof(*dwc_otg_device));
dwc_otg_device->reg_offset = 0xFFFFFFFF;
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_AHB_BUS, true);
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_PHY, true);
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_CONTROLLER, true);
+ udelay(1);
+
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_AHB_BUS, false);
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_PHY, false);
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_CONTROLLER, false);
+
busclk = clk_get(NULL, "hclk_usb_peri");
if (IS_ERR(busclk)) {
retval = PTR_ERR(busclk);
dwc_write_reg32( &global_regs->gintsts, 0xeFFFFFFF);
dwc_otg_enable_global_interrupts(core_if);
- mod_timer(&otg_dev->pcd->check_vbus_timer , jiffies + (HZ<<2));
+ mod_timer(&otg_dev->pcd->check_vbus_timer , jiffies + HZ);
//sendwakeup:
if(core_if->usb_wakeup)
memset(dwc_otg_device, 0, sizeof(*dwc_otg_device));
dwc_otg_device->reg_offset = 0xFFFFFFFF;
+ cru_set_soft_reset(SOFT_RST_UHOST, true);
+ udelay(1);
+
+ cru_set_soft_reset(SOFT_RST_UHOST, false);
+
phyclk = clk_get(NULL, "uhost");
if (IS_ERR(phyclk)) {
retval = PTR_ERR(phyclk);
dwc_otg_device = kmalloc(sizeof(dwc_otg_device_t), GFP_KERNEL);
+ cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_AHB_BUS, true);
+ cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_PHY, true);
+ cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_CONTROLLER, true);
+
+ udelay(1);
+
+ cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_AHB_BUS, false);
+ cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_PHY, false);
+ cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_CONTROLLER, false);
+
if (dwc_otg_device == 0)
{
dev_err(dev, "kmalloc of dwc_otg_device failed\n");
#include "dwc_otg_regs.h"
#include <linux/usb/composite.h>
+#include <mach/cru.h>
/**
* Static PCD pointer for use in usb_gadget_register_driver and
int dwc_pcd_reset(dwc_otg_pcd_t *pcd)
{
- dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
- dwc_otg_disable_global_interrupts( core_if );
- //
- //rockchip_scu_reset_unit(12);
- dwc_otg_pcd_reinit( pcd );
- dwc_otg_core_dev_init(core_if);
- //DWC_PRINT("%s\n" , __func__ );
- dwc_otg_enable_global_interrupts( core_if );
- return 0;
+ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+ dwc_otg_disable_global_interrupts( core_if );
+ //
+
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_AHB_BUS, true);
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_PHY, true);
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_CONTROLLER, true);
+ udelay(1);
+
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_AHB_BUS, false);
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_PHY, false);
+ cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_CONTROLLER, false);
+
+ //rockchip_scu_reset_unit(12);
+ dwc_otg_pcd_reinit( pcd );
+ dwc_otg_core_dev_init(core_if);
+ //DWC_PRINT("%s\n" , __func__ );
+ dwc_otg_enable_global_interrupts( core_if );
+ return 0;
}
/*