status = "disabled";
};
- vopl_rk_fb: vop-rk-fb@ff8f0000 {
- compatible = "rockchip,rk3399-lcdc";
- rockchip,prop = <EXTEND>;
- reg = <0x0 0xff8f0000 0x0 0x3efc>;
- interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
- clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc";
- resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
- reset-names = "axi", "ahb", "dclk";
- rockchip,grf = <&grf>;
- rockchip,pwr18 = <0>;
- rockchip,iommu-enabled = <0>;
- status = "disabled";
- };
-
- vopl_mmu_rk_fb: vopl-mmu {
- dbgname = "vop";
- compatible = "rockchip,vopl_mmu";
- reg = <0x0 0xff8f3f00 0x0 0x100>;
- interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "vopl_mmu";
- status = "okay";
- };
-
vopb_rk_fb: vop-rk-fb@ff900000 {
status = "disabled";
compatible = "rockchip,rk3399-lcdc";
status = "okay";
};
+ vopl_rk_fb: vop-rk-fb@ff8f0000 {
+ compatible = "rockchip,rk3399-lcdc";
+ rockchip,prop = <EXTEND>;
+ reg = <0x0 0xff8f0000 0x0 0x3efc>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
+ clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc";
+ resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
+ reset-names = "axi", "ahb", "dclk";
+ rockchip,grf = <&grf>;
+ rockchip,pwr18 = <0>;
+ rockchip,iommu-enabled = <0>;
+ status = "disabled";
+ };
+
+ vopl_mmu_rk_fb: vopl-mmu {
+ dbgname = "vop";
+ compatible = "rockchip,vopl_mmu";
+ reg = <0x0 0xff8f3f00 0x0 0x100>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vopl_mmu";
+ status = "okay";
+ };
+
hdmi_rk_fb: hdmi-rk-fb@ff940000 {
compatible = "rockchip,rk3399-hdmi";
reg = <0x0 0xff940000 0x0 0x20000>;