wl18xx: support 2nd set of mac/phy tx-power params
authorYair Shapira <yair.shapira@ti.com>
Tue, 27 Nov 2012 06:44:43 +0000 (08:44 +0200)
committerLuciano Coelho <coelho@ti.com>
Tue, 4 Dec 2012 15:01:39 +0000 (17:01 +0200)
First set (low, medium and high TX power values) is used
for STA-HP background role. The 2nd set is used for other roles.

Update other mac/phy parameters according to new FW.

Signed-off-by: Yair Shapira <yair.shapira@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
Conflicts:
drivers/net/wireless/ti/wl18xx/main.c

drivers/net/wireless/ti/wl18xx/conf.h
drivers/net/wireless/ti/wl18xx/main.c

index 1cb313fe368ba5793707dee0e9ff25ab59f0ad4c..b5f114857191591fabc9bbd06cab4b2f46f8be8c 100644 (file)
@@ -23,7 +23,7 @@
 #define __WL18XX_CONF_H__
 
 #define WL18XX_CONF_MAGIC      0x10e100ca
-#define WL18XX_CONF_VERSION    (WLCORE_CONF_VERSION | 0x0004)
+#define WL18XX_CONF_VERSION    (WLCORE_CONF_VERSION | 0x0005)
 #define WL18XX_CONF_MASK       0x0000ffff
 #define WL18XX_CONF_SIZE       (WLCORE_CONF_SIZE + \
                                 sizeof(struct wl18xx_priv_conf))
@@ -78,15 +78,19 @@ struct wl18xx_mac_and_phy_params {
        u8 board_type;
        /* enable point saturation */
        u8 psat;
-       /* low/medium/high Tx power in dBm */
+       /* low/medium/high Tx power in dBm for STA-HP BG */
        s8 low_power_val;
        s8 med_power_val;
        s8 high_power_val;
        s8 per_sub_band_tx_trace_loss[WL18XX_TRACE_LOSS_GAPS_TX];
        s8 per_sub_band_rx_trace_loss[WL18XX_TRACE_LOSS_GAPS_RX];
        u8 tx_rf_margin;
+       /* low/medium/high Tx power in dBm for other role */
+       s8 low_power_val_2nd;
+       s8 med_power_val_2nd;
+       s8 high_power_val_2nd;
 
-       u8 padding[4];
+       u8 padding[1];
 } __packed;
 
 enum wl18xx_ht_mode {
index 3588e340634a0365e354fd6c15438276e154daab..a45ecffef01ae6a0d70cd9035519f096eb7c929a 100644 (file)
@@ -523,14 +523,37 @@ static struct wl18xx_priv_conf wl18xx_default_priv_conf = {
                .enable_clpc                    = 0x00,
                .enable_tx_low_pwr_on_siso_rdl  = 0x00,
                .rx_profile                     = 0x00,
-               .pwr_limit_reference_11_abg     = 0xc8,
-               .pwr_limit_reference_11p        = 0xc8,
+               .pwr_limit_reference_11_abg     = 0x64,
+               .per_chan_pwr_limit_arr_11abg   = {
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+                       0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+               .pwr_limit_reference_11p        = 0x64,
+               .per_chan_pwr_limit_arr_11p     = { 0xff, 0xff, 0xff, 0xff,
+                                                   0xff, 0xff, 0xff },
                .psat                           = 0,
-               .low_power_val                  = 0x00,
-               .med_power_val                  = 0x0a,
-               .high_power_val                 = 0x11,
+               .low_power_val                  = 0x08,
+               .med_power_val                  = 0x12,
+               .high_power_val                 = 0x18,
+               .low_power_val_2nd              = 0x05,
+               .med_power_val_2nd              = 0x0a,
+               .high_power_val_2nd             = 0x14,
                .external_pa_dc2dc              = 0,
-               .number_of_assembled_ant2_4     = 1,
+               .number_of_assembled_ant2_4     = 2,
                .number_of_assembled_ant5       = 1,
                .tx_rf_margin                   = 1,
        },