Expand bitcast support in fast isel to support bitcasts of non-constant values by...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55340 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
index c8c219d39d4d8727eff54cc4818716f8398c9049..c48a2f2c621782fc3288eb1e5d33fd1abbce1e6a 100644 (file)
--- a/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -234,8 +234,36 @@ FastISel::SelectInstructions(BasicBlock::iterator Begin,
         } else
           // TODO: Support vector and fp constants.
           return I;
+      } else if (!isa<Constant>(I->getOperand(0))) {
+        // Bitcasts of non-constant values become reg-reg copies.
+        MVT SrcVT = MVT::getMVT(I->getOperand(0)->getType());
+        MVT DstVT = MVT::getMVT(I->getOperand(0)->getType());
+        
+        if (SrcVT == MVT::Other || !SrcVT.isSimple() ||
+            DstVT == MVT::Other || !DstVT.isSimple() ||
+            !TLI.isTypeLegal(SrcVT) || !TLI.isTypeLegal(DstVT))
+          // Unhandled type. Halt "fast" selection and bail.
+          return I;
+        if (!TLI.isConvertLegal(SrcVT, DstVT))
+          // Illegal conversion.  Halt "fast" selection and bail.
+          return I:
+        
+        // Otherwise, insert a register-to-register copy.
+        TargetRegisterClass* SrcClass = TLI.getRegClassFor(SrcVT);
+        TargetRegisterClass* DstClass = TLI.getRegClassFor(DstVT);
+        unsigned Op0 = ValueMap[I->getOperand(0)];
+        unsigned ResultReg = createResultReg(DstClass);
+        
+        if (Op0 == 0)
+          // Unhandled operand. Halt "fast" selection and bail.
+          return false;
+        
+        TII.copyRegToReg(*MBB, MBB->end(), ResultReg, Op0, DstClass, SrcClass);
+        ValueMap[I] = ResultReg;
+        
+        break;
       } else
-        // TODO: Support non-constant bitcasts.
+        // Casting a non-integral constant?
         return I;
 
     default: