write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
write_nic_word(dev, BCN_DMATIME, 256);
- write_nic_byte(dev, BCN_ERR_THRESH, 100);
+ rtl92e_writeb(dev, BCN_ERR_THRESH, 100);
BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
break;
}
- write_nic_byte(dev, MSR, msr);
+ rtl92e_writeb(dev, MSR, msr);
if (priv->rtllib->LedControlHandler)
priv->rtllib->LedControlHandler(dev, LedAction);
}
break;
}
- write_nic_byte(dev, MSR, btMsr);
+ rtl92e_writeb(dev, MSR, btMsr);
}
break;
case HW_VAR_SLOT_TIME:
priv->slot_time = val[0];
- write_nic_byte(dev, SLOT_TIME, val[0]);
+ rtl92e_writeb(dev, SLOT_TIME, val[0]);
break;
RT_TRACE(COMP_QOS,
"SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n",
AcmCtrl);
- write_nic_byte(dev, AcmHwCtrl, AcmCtrl);
+ rtl92e_writeb(dev, AcmHwCtrl, AcmCtrl);
break;
}
case HW_VAR_SIFS:
- write_nic_byte(dev, SIFS, val[0]);
- write_nic_byte(dev, SIFS+1, val[0]);
+ rtl92e_writeb(dev, SIFS, val[0]);
+ rtl92e_writeb(dev, SIFS+1, val[0]);
break;
case HW_VAR_RF_TIMING:
{
u8 Rf_Timing = *((u8 *)val);
- write_nic_byte(dev, rFPGA0_RFTiming1, Rf_Timing);
+ rtl92e_writeb(dev, rFPGA0_RFTiming1, Rf_Timing);
break;
}
break;
}
- write_nic_byte(dev, BW_OPMODE, regBwOpMode);
+ rtl92e_writeb(dev, BW_OPMODE, regBwOpMode);
{
u32 ratr_value = 0;
if (priv->rf_type == RF_1T2R)
ratr_value &= ~(RATE_ALL_OFDM_2SS);
write_nic_dword(dev, RATR0, ratr_value);
- write_nic_byte(dev, UFWP, 1);
+ rtl92e_writeb(dev, UFWP, 1);
}
regTmp = rtl92e_readb(dev, 0x313);
regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
rtl92e_reset_desc_ring(dev);
priv->Rf_Mode = RF_OP_By_SW_3wire;
if (priv->ResetProgress == RESET_TYPE_NORESET) {
- write_nic_byte(dev, ANAPAR, 0x37);
+ rtl92e_writeb(dev, ANAPAR, 0x37);
mdelay(500);
}
priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
if (ICVersion >= 0x4) {
SwitchingRegulatorOutput = rtl92e_readb(dev, SWREGULATOR);
if (SwitchingRegulatorOutput != 0xb8) {
- write_nic_byte(dev, SWREGULATOR, 0xa8);
+ rtl92e_writeb(dev, SWREGULATOR, 0xa8);
mdelay(1);
- write_nic_byte(dev, SWREGULATOR, 0xb8);
+ rtl92e_writeb(dev, SWREGULATOR, 0xb8);
}
}
RT_TRACE(COMP_INIT, "BB Config Start!\n");
udelay(500);
}
rtl8192_hwconfig(dev);
- write_nic_byte(dev, CMDR, CR_RE | CR_TE);
+ rtl92e_writeb(dev, CMDR, CR_RE | CR_TE);
- write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
- (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT)));
+ rtl92e_writeb(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
+ (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT)));
write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
write_nic_word(dev, MAC4, ((u16 *)(dev->dev_addr + 4))[0]);
write_nic_dword(dev, RCR, priv->ReceiveConfig);
write_nic_dword(dev, RRSR, ulRegRead);
write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
- write_nic_byte(dev, ACK_TIMEOUT, 0x30);
+ rtl92e_writeb(dev, ACK_TIMEOUT, 0x30);
if (priv->ResetProgress == RESET_TYPE_NORESET)
rtl92e_set_wireless_mode(dev, priv->rtllib->mode);
SECR_value |= SCR_TxEncEnable;
SECR_value |= SCR_RxDecEnable;
SECR_value |= SCR_NoSKMC;
- write_nic_byte(dev, SECR, SECR_value);
+ rtl92e_writeb(dev, SECR, SECR_value);
}
write_nic_word(dev, ATIMWND, 2);
write_nic_word(dev, BCN_INTERVAL, 100);
for (i = 0; i < QOS_QUEUE_NUM; i++)
write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
}
- write_nic_byte(dev, 0xbe, 0xc0);
+ rtl92e_writeb(dev, 0xbe, 0xc0);
rtl92e_config_mac(dev);
rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
- write_nic_byte(dev, 0x87, 0x0);
+ rtl92e_writeb(dev, 0x87, 0x0);
if (priv->RegRfOff) {
RT_TRACE((COMP_INIT | COMP_RF | COMP_POWER),
write_nic_word(dev, BCN_DMATIME, 256);
write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
- write_nic_byte(dev, BCN_ERR_THRESH, 100);
+ rtl92e_writeb(dev, BCN_ERR_THRESH, 100);
BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
(KEY_TYPE_WEP104 == ieee->pairwise_key_type))
rtl92e_enable_hw_security_config(dev);
} else {
- write_nic_byte(dev, 0x173, 0);
+ rtl92e_writeb(dev, 0x173, 0);
}
rtl8192e_update_msr(dev);
if (!priv->rtllib->bSupportRemoteWakeUp) {
u1bTmp = 0x0;
- write_nic_byte(dev, CMDR, u1bTmp);
+ rtl92e_writeb(dev, CMDR, u1bTmp);
}
mdelay(20);
write_nic_dword(dev, WFCRC2, 0xffffffff);
- write_nic_byte(dev, PMR, 0x5);
- write_nic_byte(dev, MacBlkCtrl, 0xa);
+ rtl92e_writeb(dev, PMR, 0x5);
+ rtl92e_writeb(dev, MacBlkCtrl, 0xa);
}
}
ieee->pHTInfo->bCurShortGI20MHz)
ratr_value |= 0x80000000;
write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
- write_nic_byte(dev, UFWP, 1);
+ rtl92e_writeb(dev, UFWP, 1);
}
void
if (priv->rf_type == RF_1T2R)
ratr_value &= ~(RATE_ALL_OFDM_2SS);
write_nic_dword(dev, RATR0, ratr_value);
- write_nic_byte(dev, UFWP, 1);
+ rtl92e_writeb(dev, UFWP, 1);
pra->last_ratr = targetRATR;
}
u32 delta = 0;
RT_TRACE(COMP_POWER_TRACKING, "%s()\n", __func__);
- write_nic_byte(dev, Pw_Track_Flag, 0);
- write_nic_byte(dev, FW_Busy_Flag, 0);
+ rtl92e_writeb(dev, Pw_Track_Flag, 0);
+ rtl92e_writeb(dev, FW_Busy_Flag, 0);
priv->rtllib->bdynamic_txpower_enable = false;
bHighpowerstate = priv->bDynamicTxHighPower;
if (priv->bResetInProgress) {
RT_TRACE(COMP_POWER_TRACKING,
"we are in silent reset progress, so return\n");
- write_nic_byte(dev, Pw_Track_Flag, 0);
- write_nic_byte(dev, FW_Busy_Flag, 0);
+ rtl92e_writeb(dev, Pw_Track_Flag, 0);
+ rtl92e_writeb(dev, FW_Busy_Flag, 0);
return;
}
if (priv->rtllib->eRFPowerState != eRfOn) {
RT_TRACE(COMP_POWER_TRACKING,
"we are in power save, so return\n");
- write_nic_byte(dev, Pw_Track_Flag, 0);
- write_nic_byte(dev, FW_Busy_Flag, 0);
+ rtl92e_writeb(dev, Pw_Track_Flag, 0);
+ rtl92e_writeb(dev, FW_Busy_Flag, 0);
return;
}
Avg_TSSI_Meas = rtl92e_readw(dev, Tssi_Mea_Value);
if (Avg_TSSI_Meas == 0) {
- write_nic_byte(dev, Pw_Track_Flag, 0);
- write_nic_byte(dev, FW_Busy_Flag, 0);
+ rtl92e_writeb(dev, Pw_Track_Flag, 0);
+ rtl92e_writeb(dev, FW_Busy_Flag, 0);
return;
}
}
if (viviflag) {
- write_nic_byte(dev, Pw_Track_Flag, 0);
+ rtl92e_writeb(dev, Pw_Track_Flag, 0);
viviflag = false;
RT_TRACE(COMP_POWER_TRACKING,
"we filted this data\n");
if (delta <= E_FOR_TX_POWER_TRACK) {
priv->rtllib->bdynamic_txpower_enable = true;
- write_nic_byte(dev, Pw_Track_Flag, 0);
- write_nic_byte(dev, FW_Busy_Flag, 0);
+ rtl92e_writeb(dev, Pw_Track_Flag, 0);
+ rtl92e_writeb(dev, FW_Busy_Flag, 0);
RT_TRACE(COMP_POWER_TRACKING,
"tx power track is done\n");
RT_TRACE(COMP_POWER_TRACKING,
if (priv->CCKPresentAttentuation_difference <= -12 ||
priv->CCKPresentAttentuation_difference >= 24) {
priv->rtllib->bdynamic_txpower_enable = true;
- write_nic_byte(dev, Pw_Track_Flag, 0);
- write_nic_byte(dev, FW_Busy_Flag, 0);
+ rtl92e_writeb(dev, Pw_Track_Flag, 0);
+ rtl92e_writeb(dev, FW_Busy_Flag, 0);
RT_TRACE(COMP_POWER_TRACKING,
"tx power track--->limited\n");
return;
}
- write_nic_byte(dev, Pw_Track_Flag, 0);
+ rtl92e_writeb(dev, Pw_Track_Flag, 0);
Avg_TSSI_Meas_from_driver = 0;
for (k = 0; k < 5; k++)
tmp_report[k] = 0;
break;
}
- write_nic_byte(dev, FW_Busy_Flag, 0);
+ rtl92e_writeb(dev, FW_Busy_Flag, 0);
}
priv->rtllib->bdynamic_txpower_enable = true;
- write_nic_byte(dev, Pw_Track_Flag, 0);
+ rtl92e_writeb(dev, Pw_Track_Flag, 0);
}
static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device *dev)
if (priv->rf_type == RF_1T2R)
ratr_value &= ~(RATE_ALL_OFDM_2SS);
write_nic_dword(dev, RATR0, ratr_value);
- write_nic_byte(dev, UFWP, 1);
+ rtl92e_writeb(dev, UFWP, 1);
if (priv->btxpower_trackingInit && priv->btxpower_tracking)
dm_txpower_reset_recovery(dev);
rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
- write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x17);
- write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x17);
- write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x17);
- write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x17);
+ rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x17);
+ rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x17);
+ rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x17);
+ rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x17);
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
- write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
+ rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x00);
else
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
+ rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x42);
- write_nic_byte(dev, 0xa0a, 0x08);
+ rtl92e_writeb(dev, 0xa0a, 0x08);
return;
}
dm_digtable.dig_state = DM_STA_DIG_ON;
if (reset_flag == 1) {
- write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x2c);
- write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x2c);
- write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x2c);
- write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x2c);
+ rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x2c);
+ rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x2c);
+ rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x2c);
+ rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x2c);
} else {
- write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x20);
- write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x20);
- write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x20);
- write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x20);
+ rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x20);
+ rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x20);
+ rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x20);
+ rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x20);
}
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
- write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
+ rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
else
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
+ rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
- write_nic_byte(dev, 0xa0a, 0xcd);
+ rtl92e_writeb(dev, 0xa0a, 0xcd);
rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1);
}
dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
- write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
+ rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x10);
else
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
+ rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x43);
} else {
if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF &&
(priv->reset_count == reset_cnt_highpwr))
(priv->undecorated_smoothed_pwdb >=
dm_digtable.rssi_high_thresh)) {
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
- write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
+ rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
else
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
+ rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
}
}
reset_cnt_highpwr = priv->reset_count;
if ((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value)
|| !initialized || force_write) {
initial_gain = (u8)dm_digtable.cur_ig_value;
- write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
- write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
- write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
- write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
+ rtl92e_writeb(dev, rOFDM0_XAAGCCore1, initial_gain);
+ rtl92e_writeb(dev, rOFDM0_XBAGCCore1, initial_gain);
+ rtl92e_writeb(dev, rOFDM0_XCAGCCore1, initial_gain);
+ rtl92e_writeb(dev, rOFDM0_XDAGCCore1, initial_gain);
dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
initialized = 1;
force_write = 0;
(initialized <= 3) || force_write) {
if (dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER) {
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
- write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
+ rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x00);
else
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
+ rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x42);
} else if (dm_digtable.curpd_thstate ==
DIG_PD_AT_NORMAL_POWER) {
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
- write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
+ rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
else
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
+ rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
} else if (dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER) {
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
- write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
+ rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x10);
else
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
+ rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x43);
}
dm_digtable.prepd_thstate = dm_digtable.curpd_thstate;
if (initialized <= 3)
if ((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
!initialized || force_write) {
if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER)
- write_nic_byte(dev, 0xa0a, 0x08);
+ rtl92e_writeb(dev, 0xa0a, 0x08);
else if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_HIGHER)
- write_nic_byte(dev, 0xa0a, 0xcd);
+ rtl92e_writeb(dev, 0xa0a, 0xcd);
dm_digtable.precs_ratio_state = dm_digtable.curcs_ratio_state;
initialized = 1;
force_write = 0;
bDoubleTimeInterval = true;
priv->bswitch_fsync = !priv->bswitch_fsync;
if (priv->bswitch_fsync) {
- write_nic_byte(dev, 0xC36, 0x1c);
- write_nic_byte(dev, 0xC3e, 0x90);
+ rtl92e_writeb(dev, 0xC36, 0x1c);
+ rtl92e_writeb(dev, 0xC3e, 0x90);
} else {
- write_nic_byte(dev, 0xC36, 0x5c);
- write_nic_byte(dev, 0xC3e, 0x96);
+ rtl92e_writeb(dev, 0xC36, 0x5c);
+ rtl92e_writeb(dev, 0xC3e, 0x96);
}
} else if (priv->undecorated_smoothed_pwdb <=
priv->rtllib->fsync_rssi_threshold) {
if (priv->bswitch_fsync) {
priv->bswitch_fsync = false;
- write_nic_byte(dev, 0xC36, 0x5c);
- write_nic_byte(dev, 0xC3e, 0x96);
+ rtl92e_writeb(dev, 0xC36, 0x5c);
+ rtl92e_writeb(dev, 0xC3e, 0x96);
}
}
if (bDoubleTimeInterval) {
} else {
if (priv->bswitch_fsync) {
priv->bswitch_fsync = false;
- write_nic_byte(dev, 0xC36, 0x5c);
- write_nic_byte(dev, 0xC3e, 0x96);
+ rtl92e_writeb(dev, 0xC36, 0x5c);
+ rtl92e_writeb(dev, 0xC3e, 0x96);
}
priv->ContinueDiffCount = 0;
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cf);
priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING,
(u8 *)(&rf_timing));
- write_nic_byte(dev, 0xc3b, 0x41);
+ rtl92e_writeb(dev, 0xc3b, 0x41);
}
static void dm_EndHWFsync(struct net_device *dev)
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING, (u8 *)
(&rf_timing));
- write_nic_byte(dev, 0xc3b, 0x49);
+ rtl92e_writeb(dev, 0xc3b, 0x49);
}
static void dm_EndSWFsync(struct net_device *dev)
if (priv->bswitch_fsync) {
priv->bswitch_fsync = false;
- write_nic_byte(dev, 0xC36, 0x5c);
+ rtl92e_writeb(dev, 0xC36, 0x5c);
- write_nic_byte(dev, 0xC3e, 0x96);
+ rtl92e_writeb(dev, 0xC3e, 0x96);
}
priv->ContinueDiffCount = 0;
}
if (priv->framesyncMonitor) {
if (reg_c38_State != RegC38_Fsync_AP_BCM) {
- write_nic_byte(dev, rOFDM0_RxDetector3, 0x95);
+ rtl92e_writeb(dev, rOFDM0_RxDetector3, 0x95);
reg_c38_State = RegC38_Fsync_AP_BCM;
}
RegC38_TH) {
if (reg_c38_State !=
RegC38_NonFsync_Other_AP) {
- write_nic_byte(dev,
+ rtl92e_writeb(dev,
rOFDM0_RxDetector3,
0x90);
} else if (priv->undecorated_smoothed_pwdb >=
(RegC38_TH+5)) {
if (reg_c38_State) {
- write_nic_byte(dev,
+ rtl92e_writeb(dev,
rOFDM0_RxDetector3,
priv->framesync);
reg_c38_State = RegC38_Default;
}
} else {
if (reg_c38_State) {
- write_nic_byte(dev, rOFDM0_RxDetector3,
- priv->framesync);
+ rtl92e_writeb(dev, rOFDM0_RxDetector3,
+ priv->framesync);
reg_c38_State = RegC38_Default;
}
}
}
if (priv->framesyncMonitor) {
if (priv->reset_count != reset_cnt) {
- write_nic_byte(dev, rOFDM0_RxDetector3,
+ rtl92e_writeb(dev, rOFDM0_RxDetector3,
priv->framesync);
reg_c38_State = RegC38_Default;
reset_cnt = priv->reset_count;
}
} else {
if (reg_c38_State) {
- write_nic_byte(dev, rOFDM0_RxDetector3,
+ rtl92e_writeb(dev, rOFDM0_RxDetector3,
priv->framesync);
reg_c38_State = RegC38_Default;
}
{
struct r8192_priv *priv = rtllib_priv(dev);
- write_nic_byte(dev, DRIVER_RSSI, (u8)priv->undecorated_smoothed_pwdb);
+ rtl92e_writeb(dev, DRIVER_RSSI, (u8)priv->undecorated_smoothed_pwdb);
}