test: Makefile: add $(BASE) variable

Makes this Makefile a little more flexible

diff --git a/test/Makefile b/test/Makefile
index a3de6fe9e7c1030d4d783cc3d5880606ddd9140f..c918368e253c6d282b9bece62f1031be4177e66c 100644 (file)
--- a/test/Makefile
+++ b/test/Makefile
@@ -1,6 +1,8 @@
-include ../common.mk
+BASE = ..
 
-CPPFLAGS += -I.. -I../include
+include $(BASE)/common.mk
+
+CPPFLAGS += -I$(BASE) -I$(BASE)/include
 
 SRCS = $(wildcard *.c)
 CPSRCS = $(wildcard *.cc)
@@ -9,10 +11,10 @@ OBJS = $(patsubst %.c,%.o,$(SRCS)) $(patsubst %.cc,%.o,$(CPSRCS))
 all: $(OBJS)
 
 %.o: %.c
-       $(CC) -o $@ $< $(CPPFLAGS) -L.. -l$(LIB_NAME)
+       $(CC) -o $@ $< $(CPPFLAGS) -L$(BASE) -l$(LIB_NAME)
 
 %.o: %.cc
-       $(CXX) -o $@ $< $(CPPFLAGS) -L.. -l$(LIB_NAME)
+       $(CXX) -o $@ $< $(CPPFLAGS) -L$(BASE) -l$(LIB_NAME)
 
 clean::
        rm -f *.o