ARM: dts: phycore-rk3288: update

Change-Id: I4aa3ffd456040c9787871096b3483995be701da5
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

diff --git a/arch/arm/boot/dts/rk3288-phycore-rdk.dts b/arch/arm/boot/dts/rk3288-phycore-rdk.dts
index 9bdb164f366092d8050a69df84e3878e2b913124..654b4eb16725cdbf73bb60f10645916b241184b2 100644 (file)
--- a/arch/arm/boot/dts/rk3288-phycore-rdk.dts
+++ b/arch/arm/boot/dts/rk3288-phycore-rdk.dts
@@ -45,6 +45,7 @@
 /dts-v1/;
 
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/leds-pca9532.h>
 #include "rk3288-phycore-som.dtsi"
 
 / {
@@ -119,7 +120,7 @@
 &i2c1 {
        status = "okay";
 
-       stmpe@44 {
+       touchscreen@44 {
                compatible = "st,stmpe811";
                reg = <0x44>;
        };
@@ -149,6 +150,44 @@
        };
 };
 
+&i2c4 {
+       status = "okay";
+
+       /* PCA9533 - 4-bit LED dimmer */
+       leddim: leddimmer@62 {
+               compatible = "nxp,pca9533";
+               reg = <0x62>;
+
+               led1 {
+                       label = "red:user1";
+                       linux,default-trigger = "none";
+                       type = <PCA9532_TYPE_LED>;
+               };
+
+               led2 {
+                       label = "green:user2";
+                       linux,default-trigger = "none";
+                       type = <PCA9532_TYPE_LED>;
+               };
+
+               led3 {
+                       label = "blue:user3";
+                       linux,default-trigger = "none";
+                       type = <PCA9532_TYPE_LED>;
+               };
+
+               led4 {
+                       label = "red:user4";
+                       linux,default-trigger = "none";
+                       type = <PCA9532_TYPE_LED>;
+               };
+       };
+};
+
+&i2c5 {
+       status = "okay";
+};
+
 &pinctrl {
        pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
                bias-pull-up;
@@ -224,10 +263,10 @@
        cap-sd-highspeed;
        card-detect-delay = <200>;
        disable-wp;
+       supports-sd;
        num-slots = <1>;
        pinctrl-names = "default";
        pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
-       supports-sd;
        vmmc-supply = <&vdd_io_sd>;
        vqmmc-supply = <&vdd_io_sd>;
        status = "okay";

diff --git a/arch/arm/boot/dts/rk3288-phycore-som.dtsi b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
index 2471fc5843252e11a0457a186c08cf537a9bcd46..ab7c0c095270c32a547c39acd5cc584d28307530 100644 (file)
--- a/arch/arm/boot/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
@@ -83,23 +83,6 @@
                };
        };
 
-       sound {
-               compatible = "simple-audio-card";
-               simple-audio-card,format = "i2s";
-               simple-audio-card,name = "rockchip,phytec-codec";
-               simple-audio-card,mclk-fs = <512>;
-
-               simple-audio-card,dai-link@0 {
-                       format = "i2s";
-                       cpu {
-                               sound-dai = <&i2s>;
-                       };
-                       codec {
-                               sound-dai = <&hdmi>;
-                       };
-               };
-       };
-
        vdd_emmc_io: vdd-emmc-io {
                compatible = "regulator-fixed";
                regulator-name = "vdd_emmc_io";
@@ -129,6 +112,22 @@
 
 &cpu0 {
        cpu0-supply = <&vdd_cpu>;
+       operating-points = <
+               /* KHz    uV */
+               1800000 1400000
+               1608000 1350000
+               1512000 1300000
+               1416000 1200000
+               1200000 1100000
+               1008000 1050000
+                816000 1000000
+                696000  950000
+                600000  900000
+                408000  900000
+                312000  900000
+                216000  900000
+                126000  900000
+       >;
 };
 
 &emmc {
@@ -150,13 +149,32 @@
        clock_in_out = "input";
        pinctrl-names = "default";
        pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
+       phy-handle = <&phy0>;
        phy-supply = <&vdd_eth_2v5>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-id";
        snps,reset-active-low;
        snps,reset-delays-us = <0 10000 1000000>;
        snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
-       tx_delay = <0x30>;
-       rx_delay = <0x10>;
+       tx_delay = <0x0>;
+       rx_delay = <0x0>;
+
+       mdio0 {
+               compatible = "snps,dwmac-mdio";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               phy0: ethernet-phy@0 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       reg = <0>;
+                       interrupt-parent = <&gpio4>;
+                       interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+                       ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+                       ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+                       ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+                       enet-phy-lane-no-swap;
+                       ti,clk-output-sel = <DP83867_CLK_O_SEL_CHN_A_TCLK>;
+               };
+       };
 };
 
 &gpu {
@@ -195,7 +213,6 @@
        rk818: pmic@1c {
                compatible = "rockchip,rk818";
                reg = <0x1c>;
-
                clock-output-names = "xin32k";
                interrupt-parent = <&gpio0>;
                interrupts = <4 IRQ_TYPE_LEVEL_LOW>;