//rockchip,tristate = <VALUE_TRI_DEFAULT>;
};
};
+ gpio0_pwm{
+
+ pwm0_pin:pwm0 {
+ rockchip,pins = <PWM0>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ pwm1_pin:pwm1 {
+ rockchip,pins = <PWM1>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ pwm2_pin:pwm2 {
+ rockchip,pins = <PWM2>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ pwm3_pin:pwm3 {
+ rockchip,pins = <PWM3(IR)>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
vol_domain {
ap0_vcc:ap0-vcc {
compatible = "rockchip,rk-pwm";
reg = <0x20050000 0x10>;
#pwm-cells = <2>;
- //pinctrl-names = "default";
- //pinctrl-0 = <&pwm_pin>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
clocks = <&clk_gates7 10>;
clock-names = "pclk_pwm";
status = "disabled";
compatible = "rockchip,rk-pwm";
reg = <0x20050010 0x10>;
#pwm-cells = <2>;
- //pinctrl-names = "default";
- //pinctrl-0 = <&pwm_pin>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_pin>;
clocks = <&clk_gates7 10>;
clock-names = "pclk_pwm";
status = "disabled";
compatible = "rockchip,rk-pwm";
reg = <0x20050020 0x10>;
#pwm-cells = <2>;
- //pinctrl-names = "default";
- //pinctrl-0 = <&pwm_pin>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2_pin>;
clocks = <&clk_gates7 10>;
clock-names = "pclk_pwm";
status = "disabled";
compatible = "rockchip,rk-pwm";
reg = <0x20050030 0x10>;
#pwm-cells = <2>;
- //pinctrl-names = "default";
- //pinctrl-0 = <&pwm_pin>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3_pin>;
clocks = <&clk_gates7 10>;
clock-names = "pclk_pwm";
status = "disabled";