rk3036: add pwm-pinctrl
author许盛飞 <xsf@rock-chips.com>
Tue, 8 Jul 2014 11:43:32 +0000 (19:43 +0800)
committer许盛飞 <xsf@rock-chips.com>
Tue, 8 Jul 2014 11:43:32 +0000 (19:43 +0800)
arch/arm/boot/dts/rk3036-pinctrl.dtsi
arch/arm/boot/dts/rk3036.dtsi

index 96cda83ef1498d492259efb7c6e4942950878c11..75ef0830a27e90f1028bdf032bdd96090837c110 100755 (executable)
                                         //rockchip,tristate = <VALUE_TRI_DEFAULT>;
                                 };
                 };
+               gpio0_pwm{
+
+                       pwm0_pin:pwm0 {
+                                rockchip,pins = <PWM0>;
+                                rockchip,pull = <VALUE_PULL_DISABLE>;
+                                rockchip,drive = <VALUE_DRV_DEFAULT>;
+                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+                        };
+
+                        pwm1_pin:pwm1 {
+                                rockchip,pins = <PWM1>;
+                                rockchip,pull = <VALUE_PULL_DISABLE>;
+                                rockchip,drive = <VALUE_DRV_DEFAULT>;
+                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+                        };
+
+                        pwm2_pin:pwm2 {
+                                rockchip,pins = <PWM2>;
+                                rockchip,pull = <VALUE_PULL_DISABLE>;
+                                rockchip,drive = <VALUE_DRV_DEFAULT>;
+                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+                        };
+                       
+                       pwm3_pin:pwm3 {
+                                rockchip,pins = <PWM3(IR)>;
+                                rockchip,pull = <VALUE_PULL_DISABLE>;
+                                rockchip,drive = <VALUE_DRV_DEFAULT>;
+                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+                        };
+               };
 
                vol_domain {
                        ap0_vcc:ap0-vcc {
index 9da50489462e052b85a4cc893957dc3d66638e17..8e49b79881d0774616a14d372a62fd3b255f2c4e 100755 (executable)
                compatible = "rockchip,rk-pwm";
                reg = <0x20050000 0x10>;
                #pwm-cells = <2>;
-               //pinctrl-names = "default";
-               //pinctrl-0 = <&pwm_pin>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm0_pin>;
                clocks = <&clk_gates7 10>;
                clock-names = "pclk_pwm";
                status = "disabled";
                 compatible = "rockchip,rk-pwm";
                 reg = <0x20050010 0x10>;
                 #pwm-cells = <2>;
-                //pinctrl-names = "default";
-                //pinctrl-0 = <&pwm_pin>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm1_pin>;
                 clocks = <&clk_gates7 10>;
                 clock-names = "pclk_pwm";
                 status = "disabled";
                 compatible = "rockchip,rk-pwm";
                 reg = <0x20050020 0x10>;
                 #pwm-cells = <2>;
-                //pinctrl-names = "default";
-                //pinctrl-0 = <&pwm_pin>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm2_pin>;
                 clocks = <&clk_gates7 10>;
                 clock-names = "pclk_pwm";
                 status = "disabled";
                 compatible = "rockchip,rk-pwm";
                 reg = <0x20050030 0x10>;
                 #pwm-cells = <2>;
-                //pinctrl-names = "default";
-                //pinctrl-0 = <&pwm_pin>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pwm3_pin>;
                 clocks = <&clk_gates7 10>;
                 clock-names = "pclk_pwm";
                 status = "disabled";