BACKPORT: arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm...
authorCatalin Marinas <catalin.marinas@arm.com>
Fri, 1 Jul 2016 14:48:55 +0000 (15:48 +0100)
committerAmit Pundir <amit.pundir@linaro.org>
Mon, 16 Jan 2017 09:20:50 +0000 (14:50 +0530)
This patch takes the errata workaround code out of cpu_do_switch_mm into
a dedicated post_ttbr0_update_workaround macro which will be reused in a
subsequent patch.

Cc: Will Deacon <will.deacon@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Kees Cook <keescook@chromium.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Bug: 31432001
Change-Id: I2b45b11ab7390c3545b9e162532109c1526bef14
(cherry picked from commit f33bcf03e6079668da6bf4eec4a7dcf9289131d0)
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
arch/arm64/include/asm/assembler.h
arch/arm64/mm/proc.S

index bacc75b6c78cc2d449487f9a9bf3f23f1317d638..7b2a8925ac86426fdd1cdc5ddaab2a38982d4837 100644 (file)
@@ -371,4 +371,17 @@ alternative_endif
        movk    \reg, :abs_g0_nc:\val
        .endm
 
+/*
+ * Errata workaround post TTBR0_EL1 update.
+ */
+       .macro  post_ttbr0_update_workaround
+#ifdef CONFIG_CAVIUM_ERRATUM_27456
+alternative_if ARM64_WORKAROUND_CAVIUM_27456
+       ic      iallu
+       dsb     nsh
+       isb
+alternative_else_nop_endif
+#endif
+       .endm
+
 #endif /* __ASM_ASSEMBLER_H */
index 5bb61de2320172c806ee58959e3f721b2b243a99..8292784d44c95508c50be40b201454fafc488d2e 100644 (file)
@@ -125,17 +125,8 @@ ENTRY(cpu_do_switch_mm)
        bfi     x0, x1, #48, #16                // set the ASID
        msr     ttbr0_el1, x0                   // set TTBR0
        isb
-alternative_if_not ARM64_WORKAROUND_CAVIUM_27456
+       post_ttbr0_update_workaround
        ret
-       nop
-       nop
-       nop
-alternative_else
-       ic      iallu
-       dsb     nsh
-       isb
-       ret
-alternative_endif
 ENDPROC(cpu_do_switch_mm)
 
        .pushsection ".idmap.text", "ax"