find_resolution = 1;\r
}\r
break;\r
- case HDMI_720x576p_50Hz:\r
+ case HDMI_720x576p_50Hz_4x3:\r
if(ANX7150_edid_result.supported_576p_50Hz){\r
- resolution_real = HDMI_720x576p_50Hz;\r
+ resolution_real = HDMI_720x576p_50Hz_4x3;\r
+ find_resolution = 1;\r
+ }\r
+ break;\r
+ case HDMI_720x576p_50Hz_16x9:\r
+ if(ANX7150_edid_result.supported_576p_50Hz){\r
+ resolution_real = HDMI_720x576p_50Hz_16x9;\r
+ find_resolution = 1;\r
+ }\r
+ break;\r
+ case HDMI_720x480p_60Hz_4x3:\r
+ if(ANX7150_edid_result.supported_720x480p_60Hz){\r
+ resolution_real = HDMI_720x480p_60Hz_4x3;\r
+ find_resolution = 1;\r
+ }\r
+ break;\r
+ case HDMI_720x480p_60Hz_16x9:\r
+ if(ANX7150_edid_result.supported_720x480p_60Hz){\r
+ resolution_real = HDMI_720x480p_60Hz_16x9;\r
find_resolution = 1;\r
}\r
break;\r
find_resolution = 1;\r
}\r
break;\r
+ case HDMI_1920x1080p_60Hz:\r
+ if(ANX7150_edid_result.supported_1080p_60Hz){\r
+ resolution_real = HDMI_1920x1080p_60Hz;\r
+ find_resolution = 1;\r
+ }\r
+ break;\r
default:\r
break;\r
}\r
else if(ANX7150_edid_result.supported_720p_60Hz)\r
resolution_real = HDMI_1280x720p_60Hz;\r
else if(ANX7150_edid_result.supported_576p_50Hz)\r
- resolution_real = HDMI_720x576p_50Hz;\r
+ resolution_real = HDMI_720x576p_50Hz_4x3;\r
+ else if(ANX7150_edid_result.supported_720x480p_60Hz)\r
+ resolution_real = HDMI_720x480p_60Hz_4x3;\r
else if(ANX7150_edid_result.supported_1080p_50Hz)\r
resolution_real = HDMI_1920x1080p_50Hz;\r
+ else if(ANX7150_edid_result.supported_1080p_60Hz)\r
+ resolution_real = HDMI_1920x1080p_60Hz;\r
else\r
resolution_real = HDMI_1280x720p_50Hz;\r
}\r
case HDMI_1280x720p_60Hz:\r
g_video_format = ANX7150_V1280x720p_60Hz;\r
break;\r
- case HDMI_720x576p_50Hz:\r
+ case HDMI_720x576p_50Hz_4x3:\r
g_video_format = ANX7150_V720x576p_50Hz_4x3;\r
break;\r
+ case HDMI_720x576p_50Hz_16x9:\r
+ g_video_format = ANX7150_V720x576p_50Hz_16x9;\r
+ break;\r
+ case HDMI_720x480p_60Hz_4x3:\r
+ g_video_format = ANX7150_V720x480p_60Hz_4x3;\r
+ break;\r
+ case HDMI_720x480p_60Hz_16x9:\r
+ g_video_format = ANX7150_V720x480p_60Hz_16x9;\r
+ break;\r
case HDMI_1920x1080p_50Hz:\r
g_video_format = ANX7150_V1920x1080p_50Hz;\r
break;\r
+ case HDMI_1920x1080p_60Hz:\r
+ g_video_format = ANX7150_V1920x1080p_60Hz;\r
+ break;\r
default:\r
g_video_format = ANX7150_V1280x720p_50Hz;\r
break;\r
#define DCLK_POL 1
#define SWAP_RB 0
-/* 720p@60Hz Timing */
-#define OUT_CLK 74250000
-#define H_PW 40
-#define H_BP 220
-#define H_VD 1280
-#define H_FP 110
-#define V_PW 5
-#define V_BP 20
-#define V_VD 720
-#define V_FP 5
/* 720p@50Hz Timing */
-#define OUT_CLK2 74250000
-#define H_PW2 40
-#define H_BP2 220
-#define H_VD2 1280
-#define H_FP2 440
+#define OUT_CLK0 74250000
+#define H_PW0 40
+#define H_BP0 220
+#define H_VD0 1280
+#define H_FP0 440
+#define V_PW0 5
+#define V_BP0 20
+#define V_VD0 720
+#define V_FP0 5
+
+/* 720p@60Hz Timing */
+#define OUT_CLK1 74250000
+#define H_PW1 40
+#define H_BP1 220
+#define H_VD1 1280
+#define H_FP1 110
+#define V_PW1 5
+#define V_BP1 20
+#define V_VD1 720
+#define V_FP1 5
+
+/* 576p@50Hz Timing */
+#define OUT_CLK2 27000000
+#define H_PW2 64
+#define H_BP2 68
+#define H_VD2 720
+#define H_FP2 12
#define V_PW2 5
-#define V_BP2 20
-#define V_VD2 720
+#define V_BP2 39
+#define V_VD2 576
#define V_FP2 5
-/* 576p@50Hz Timing */
+/* 720x480p@60Hz Timing */
#define OUT_CLK3 27000000
-#define H_PW3 64
-#define H_BP3 68
+#define H_PW3 62
+#define H_BP3 60
#define H_VD3 720
-#define H_FP3 12
+#define H_FP3 16
#define V_PW3 5
-#define V_BP3 39
-#define V_VD3 576
+#define V_BP3 35
+#define V_VD3 480
#define V_FP3 5
/* 1080p@50Hz Timing */
-#define OUT_CLK4 148500000
+#define OUT_CLK5 148500000
#define H_PW4 44
#define H_BP4 148
#define H_VD4 1920
#define V_VD4 1080
#define V_FP4 5
+/* 1080p@60Hz Timing */
+#define OUT_CLK4 148500000
+#define H_PW5 44
+#define H_BP5 148
+#define H_VD5 1920
+#define H_FP5 88
+#define V_PW5 5
+#define V_BP5 35
+#define V_VD5 1080
+#define V_FP5 5
+
extern int FB_Switch_Screen( struct rk29fb_screen *screen, u32 enable );
return 0;
}
-static void hdmi_set_info(struct rk29fb_screen *screen)
-{
- struct rk29fb_screen *screen2 = screen + 1;
- struct rk29fb_screen *screen3 = screen + 2;
- struct rk29fb_screen *screen4 = screen + 3;
-
- /* ****************** 720p@60Hz ******************* */
- /* screen type & face */
- screen->type = OUT_TYPE;
- screen->face = OUT_FACE;
-
- /* Screen size */
- screen->x_res = H_VD;
- screen->y_res = V_VD;
-
- /* Timing */
- screen->pixclock = OUT_CLK;
- screen4->lcdc_aclk = LCD_ACLK;
- screen->left_margin = H_BP;
- screen->right_margin = H_FP;
- screen->hsync_len = H_PW;
- screen->upper_margin = V_BP;
- screen->lower_margin = V_FP;
- screen->vsync_len = V_PW;
-
- /* Pin polarity */
- screen->pin_hsync = 0;
- screen->pin_vsync = 0;
- screen->pin_den = 0;
- screen->pin_dclk = DCLK_POL;
-
- /* Swap rule */
- screen->swap_rb = SWAP_RB;
- screen->swap_rg = 0;
- screen->swap_gb = 0;
- screen->swap_delta = 0;
- screen->swap_dumy = 0;
-
- /* Operation function*/
- screen->init = anx7150_init;
- screen->standby = anx7150_standby;
-
-
- /* ****************** 720p@50Hz ******************* */
- /* screen type & face */
- screen2->type = OUT_TYPE;
- screen2->face = OUT_FACE;
-
- /* Screen size */
- screen2->x_res = H_VD2;
- screen2->y_res = V_VD2;
-
- /* Timing */
- screen2->pixclock = OUT_CLK2;
- screen2->lcdc_aclk = LCD_ACLK;
- screen2->left_margin = H_BP2;
- screen2->right_margin = H_FP2;
- screen2->hsync_len = H_PW2;
- screen2->upper_margin = V_BP2;
- screen2->lower_margin = V_FP2;
- screen2->vsync_len = V_PW2;
-
- /* Pin polarity */
- screen2->pin_hsync = 0;
- screen2->pin_vsync = 0;
- screen2->pin_den = 0;
- screen2->pin_dclk = DCLK_POL;
-
- /* Swap rule */
- screen2->swap_rb = SWAP_RB;
- screen2->swap_rg = 0;
- screen2->swap_gb = 0;
- screen2->swap_delta = 0;
- screen2->swap_dumy = 0;
-
- /* Operation function*/
- screen2->init = anx7150_init;
- screen2->standby = anx7150_standby;
-
- /* ****************** 576p@50Hz ******************* */
- /* screen type & face */
- screen3->type = OUT_TYPE;
- screen3->face = OUT_FACE;
-
- /* Screen size */
- screen3->x_res = H_VD3;
- screen3->y_res = V_VD3;
-
- /* Timing */
- screen3->pixclock = OUT_CLK3;
- screen3->lcdc_aclk = LCD_ACLK;
- screen3->left_margin = H_BP3;
- screen3->right_margin = H_FP3;
- screen3->hsync_len = H_PW3;
- screen3->upper_margin = V_BP3;
- screen3->lower_margin = V_FP3;
- screen3->vsync_len = V_PW3;
-
- /* Pin polarity */
- screen3->pin_hsync = 0;
- screen3->pin_vsync = 0;
- screen3->pin_den = 0;
- screen3->pin_dclk = DCLK_POL;
-
- /* Swap rule */
- screen3->swap_rb = SWAP_RB;
- screen3->swap_rg = 0;
- screen3->swap_gb = 0;
- screen3->swap_delta = 0;
- screen3->swap_dumy = 0;
-
- /* Operation function*/
- screen3->init = anx7150_init;
- screen3->standby = anx7150_standby;
- /* ****************** 1080p@50Hz ******************* */
- /* screen type & face */
- screen4->type = OUT_TYPE;
- screen4->face = OUT_FACE;
- /* Screen size */
- screen4->x_res = H_VD4;
- screen4->y_res = V_VD4;
-
- /* Timing */
- screen4->pixclock = OUT_CLK4;
- screen4->lcdc_aclk = LCD_ACLK;
- screen4->left_margin = H_BP4;
- screen4->right_margin = H_FP4;
- screen4->hsync_len = H_PW4;
- screen4->upper_margin = V_BP4;
- screen4->lower_margin = V_FP4;
- screen4->vsync_len = V_PW4;
-
- /* Pin polarity */
- screen4->pin_hsync = 0;
- screen4->pin_vsync = 0;
- screen4->pin_den = 0;
- screen4->pin_dclk = DCLK_POL;
-
- /* Swap rule */
- screen4->swap_rb = SWAP_RB;
- screen4->swap_rg = 0;
- screen4->swap_gb = 0;
- screen4->swap_delta = 0;
- screen4->swap_dumy = 0;
-
- /* Operation function*/
- screen4->init = anx7150_init;
- screen4->standby = anx7150_standby;
-}
+struct rk29fb_screen hdmi_info[] = {
+ {
+ .type = OUT_TYPE,
+ .face = OUT_FACE,
+ .x_res = H_VD0,
+ .y_res = V_VD0,
+ .pixclock = OUT_CLK0,
+ .lcdc_aclk = LCD_ACLK,
+ .left_margin = H_BP0,
+ .right_margin = H_FP0,
+ .hsync_len = H_PW0,
+ .upper_margin = V_BP0,
+ .lower_margin = V_FP0,
+ .vsync_len = V_PW0,
+ .pin_hsync = 0,
+ .pin_vsync = 0,
+ .pin_den = 0,
+ .pin_dclk = DCLK_POL,
+ .swap_rb = SWAP_RB,
+ .swap_rg = 0,
+ .swap_gb = 0,
+ .swap_delta = 0,
+ .swap_dumy = 0,
+ .init = anx7150_init,
+ .standby = anx7150_standby,
+ }, //HDMI_1280x720p_50Hz
+ {
+ .type = OUT_TYPE,
+ .face = OUT_FACE,
+ .x_res = H_VD1,
+ .y_res = V_VD1,
+ .pixclock = OUT_CLK1,
+ .lcdc_aclk = LCD_ACLK,
+ .left_margin = H_BP1,
+ .right_margin = H_FP1,
+ .hsync_len = H_PW1,
+ .upper_margin = V_BP1,
+ .lower_margin = V_FP1,
+ .vsync_len = V_PW1,
+ .pin_hsync = 0,
+ .pin_vsync = 0,
+ .pin_den = 0,
+ .pin_dclk = DCLK_POL,
+ .swap_rb = SWAP_RB,
+ .swap_rg = 0,
+ .swap_gb = 0,
+ .swap_delta = 0,
+ .swap_dumy = 0,
+ .init = anx7150_init,
+ .standby = anx7150_standby,
+ }, //HDMI_1280x720p_60Hz
+ {
+ .type = OUT_TYPE,
+ .face = OUT_FACE,
+ .x_res = H_VD2,
+ .y_res = V_VD2,
+ .pixclock = OUT_CLK2,
+ .lcdc_aclk = LCD_ACLK,
+ .left_margin = H_BP2,
+ .right_margin = H_FP2,
+ .hsync_len = H_PW2,
+ .upper_margin = V_BP2,
+ .lower_margin = V_FP2,
+ .vsync_len = V_PW2,
+ .pin_hsync = 0,
+ .pin_vsync = 0,
+ .pin_den = 0,
+ .pin_dclk = DCLK_POL,
+ .swap_rb = SWAP_RB,
+ .swap_rg = 0,
+ .swap_gb = 0,
+ .swap_delta = 0,
+ .swap_dumy = 0,
+ .init = anx7150_init,
+ .standby = anx7150_standby,
+ }, //HDMI_720x576p_50Hz_4x3
+ {
+ .type = OUT_TYPE,
+ .face = OUT_FACE,
+ .x_res = H_VD2,
+ .y_res = V_VD2,
+ .pixclock = OUT_CLK2,
+ .lcdc_aclk = LCD_ACLK,
+ .left_margin = H_BP2,
+ .right_margin = H_FP2,
+ .hsync_len = H_PW2,
+ .upper_margin = V_BP2,
+ .lower_margin = V_FP2,
+ .vsync_len = V_PW2,
+ .pin_hsync = 0,
+ .pin_vsync = 0,
+ .pin_den = 0,
+ .pin_dclk = DCLK_POL,
+ .swap_rb = SWAP_RB,
+ .swap_rg = 0,
+ .swap_gb = 0,
+ .swap_delta = 0,
+ .swap_dumy = 0,
+ .init = anx7150_init,
+ .standby = anx7150_standby,
+ }, //HDMI_720x576p_50Hz_16x9
+ {
+ .type = OUT_TYPE,
+ .face = OUT_FACE,
+ .x_res = H_VD3,
+ .y_res = V_VD3,
+ .pixclock = OUT_CLK3,
+ .lcdc_aclk = LCD_ACLK,
+ .left_margin = H_BP3,
+ .right_margin = H_FP3,
+ .hsync_len = H_PW3,
+ .upper_margin = V_BP3,
+ .lower_margin = V_FP3,
+ .vsync_len = V_PW3,
+ .pin_hsync = 0,
+ .pin_vsync = 0,
+ .pin_den = 0,
+ .pin_dclk = DCLK_POL,
+ .swap_rb = SWAP_RB,
+ .swap_rg = 0,
+ .swap_gb = 0,
+ .swap_delta = 0,
+ .swap_dumy = 0,
+ .init = anx7150_init,
+ .standby = anx7150_standby,
+ }, //HDMI_720x480p_60Hz_4x3
+ {
+ .type = OUT_TYPE,
+ .face = OUT_FACE,
+ .x_res = H_VD3,
+ .y_res = V_VD3,
+ .pixclock = OUT_CLK3,
+ .lcdc_aclk = LCD_ACLK,
+ .left_margin = H_BP3,
+ .right_margin = H_FP3,
+ .hsync_len = H_PW3,
+ .upper_margin = V_BP3,
+ .lower_margin = V_FP3,
+ .vsync_len = V_PW3,
+ .pin_hsync = 0,
+ .pin_vsync = 0,
+ .pin_den = 0,
+ .pin_dclk = DCLK_POL,
+ .swap_rb = SWAP_RB,
+ .swap_rg = 0,
+ .swap_gb = 0,
+ .swap_delta = 0,
+ .swap_dumy = 0,
+ .init = anx7150_init,
+ .standby = anx7150_standby,
+ }, //HDMI_720x480p_60Hz_16x9
+ {
+ .type = OUT_TYPE,
+ .face = OUT_FACE,
+ .x_res = H_VD4,
+ .y_res = V_VD4,
+ .pixclock = OUT_CLK4,
+ .lcdc_aclk = LCD_ACLK,
+ .left_margin = H_BP4,
+ .right_margin = H_FP4,
+ .hsync_len = H_PW4,
+ .upper_margin = V_BP4,
+ .lower_margin = V_FP4,
+ .vsync_len = V_PW4,
+ .pin_hsync = 0,
+ .pin_vsync = 0,
+ .pin_den = 0,
+ .pin_dclk = DCLK_POL,
+ .swap_rb = SWAP_RB,
+ .swap_rg = 0,
+ .swap_gb = 0,
+ .swap_delta = 0,
+ .swap_dumy = 0,
+ .init = anx7150_init,
+ .standby = anx7150_standby,
+ }, //HDMI_1920x1080p_50Hz
+ {
+ .type = OUT_TYPE,
+ .face = OUT_FACE,
+ .x_res = H_VD5,
+ .y_res = V_VD5,
+ .pixclock = OUT_CLK5,
+ .lcdc_aclk = LCD_ACLK,
+ .left_margin = H_BP5,
+ .right_margin = H_FP5,
+ .hsync_len = H_PW5,
+ .upper_margin = V_BP5,
+ .lower_margin = V_FP5,
+ .vsync_len = V_PW5,
+ .pin_hsync = 0,
+ .pin_vsync = 0,
+ .pin_den = 0,
+ .pin_dclk = DCLK_POL,
+ .swap_rb = SWAP_RB,
+ .swap_rg = 0,
+ .swap_gb = 0,
+ .swap_delta = 0,
+ .swap_dumy = 0,
+ .init = anx7150_init,
+ .standby = anx7150_standby,
+ }, //HDMI_1920x1080p_60Hz
+};
int hdmi_switch_fb(struct hdmi *hdmi, int type)
{
int rc = 0;
- struct rk29fb_screen hdmi_info[4];
-
- hdmi_set_info(&hdmi_info[0]);
-
+
switch(hdmi->resolution)
{
case HDMI_1280x720p_50Hz:
- rc = FB_Switch_Screen(&hdmi_info[1], type);
+ rc = FB_Switch_Screen(&hdmi_info[0], type);
break;
case HDMI_1280x720p_60Hz:
- rc = FB_Switch_Screen(&hdmi_info[0], type);
+ rc = FB_Switch_Screen(&hdmi_info[1], type);
break;
- case HDMI_720x576p_50Hz:
+ case HDMI_720x576p_50Hz_4x3:
rc = FB_Switch_Screen(&hdmi_info[2], type);
break;
- case HDMI_1920x1080p_50Hz:
+ case HDMI_720x576p_50Hz_16x9:
rc = FB_Switch_Screen(&hdmi_info[3], type);
break;
+ case HDMI_720x480p_60Hz_4x3:
+ rc = FB_Switch_Screen(&hdmi_info[4], type);
+ break;
+ case HDMI_720x480p_60Hz_16x9:
+ rc = FB_Switch_Screen(&hdmi_info[5], type);
+ break;
+ case HDMI_1920x1080p_50Hz:
+ rc = FB_Switch_Screen(&hdmi_info[6], type);
+ break;
+ case HDMI_1920x1080p_60Hz:
+ rc = FB_Switch_Screen(&hdmi_info[7], type);
+ break;
default:
- rc = FB_Switch_Screen(&hdmi_info[1], type);
+ rc = FB_Switch_Screen(&hdmi_info[0], type);
break;
}
if(hdmi->wait == 1) {
int hdmi_get_default_resolution(void *screen)
{
- struct rk29fb_screen hdmi_info[4];
-
- hdmi_set_info(&hdmi_info[0]);
memcpy((struct rk29fb_screen*)screen, &hdmi_info[HDMI_DEFAULT_RESOLUTION], sizeof(struct rk29fb_screen));
return 0;
}