#define __LC_USER_ASCE 0xC50
#define __LC_PANIC_STACK 0xC54
#define __LC_CPUID 0xC60
-#define __LC_IPLDEV 0xC7C
#define __LC_CURRENT 0xC90
#define __LC_INT_CLOCK 0xC98
#else /* __s390x__ */
#define __LC_USER_ASCE 0xD60
#define __LC_PANIC_STACK 0xD68
#define __LC_CPUID 0xD80
-#define __LC_IPLDEV 0xDB8
#define __LC_CURRENT 0xDD8
#define __LC_INT_CLOCK 0xDE8
#define __LC_VDSO_PER_CPU 0xE38
/* entry.S sensitive area start */
cpuid_t cpu_id; /* 0xc60 */
__u32 cpu_nr; /* 0xc68 */
- __u32 ipl_device; /* 0xc6c */
- __u8 pad_0xc70[0xc80-0xc70]; /* 0xc70 */
+ __u8 pad_0xc6c[0xc80-0xc6c]; /* 0xc6c */
/* entry.S sensitive area end */
/* SMP info area: defined by DJB */
/* entry.S sensitive area start */
cpuid_t cpu_id; /* 0xd80 */
__u32 cpu_nr; /* 0xd88 */
- __u32 ipl_device; /* 0xd8c */
- __u8 pad_0xd90[0xdc0-0xd90]; /* 0xd90 */
+ __u8 pad_0xd8c[0xdc0-0xd8c]; /* 0xd8c */
/* entry.S sensitive area end */
/* SMP info area: defined by DJB */
lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
# move IPL device to lowcore
- mvc __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
#
# Setup stack
#
lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
# move IPL device to lowcore
- mvc __LC_IPLDEV(4),IPL_DEVICE+4-PARMAREA(%r12)
lghi %r0,__LC_PASTE
stg %r0,__LC_VDSO_PER_CPU
#
PSW_ADDR_AMODE | (unsigned long) mcck_int_handler;
lc->io_new_psw.mask = psw_kernel_bits;
lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler;
- lc->ipl_device = S390_lowcore.ipl_device;
lc->clock_comparator = -1ULL;
lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE;
lc->async_stack = (unsigned long)
cpu_lowcore->current_task = (unsigned long) idle;
cpu_lowcore->cpu_nr = cpu;
cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
- cpu_lowcore->ipl_device = S390_lowcore.ipl_device;
eieio();
while (signal_processor(cpu, sigp_restart) == sigp_busy)