drm/msm/hdmi: remove ->reset() from HDMI PHY
authorStephane Viau <sviau@codeaurora.org>
Fri, 19 Jun 2015 20:04:46 +0000 (16:04 -0400)
committerRob Clark <robdclark@gmail.com>
Sat, 15 Aug 2015 22:27:12 +0000 (18:27 -0400)
->reset() currently only accesses HDMI core registers, and yet it
is located in hdmi_phy*. Since no PHY registers are being
accessed during ->reset(), it would be better to bring that
function in hdmi core module where HDMI core registers are
usually being accessed.

This will also help for msm8x94 for which no PHY registers
accesses are done (->phy_init == NULL) but the HDMI PHY reset
from HDMI core still needs to be done.

Note:
SW_RESET_PLL bit is not written in hdmi_phy_8x60_reset(); this
write should not affect anything if the corresponding field is
not writable.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
[fixed warning about unused 'phy' in hpd_enable() while merging]
Signed-off-by: Rob Clark <robdclark@gmail.com>
drivers/gpu/drm/msm/hdmi/hdmi.h
drivers/gpu/drm/msm/hdmi/hdmi_connector.c
drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c
drivers/gpu/drm/msm/hdmi/hdmi_phy_8x60.c
drivers/gpu/drm/msm/hdmi/hdmi_phy_8x74.c

index 588f7a648555b070aa9e3e7402b284271e7e2580..d0e663192d01f6b3471f8ef578bc16a2e538cd10 100644 (file)
@@ -139,7 +139,6 @@ static inline u32 hdmi_qfprom_read(struct hdmi *hdmi, u32 reg)
 
 struct hdmi_phy_funcs {
        void (*destroy)(struct hdmi_phy *phy);
-       void (*reset)(struct hdmi_phy *phy);
        void (*powerup)(struct hdmi_phy *phy, unsigned long int pixclock);
        void (*powerdown)(struct hdmi_phy *phy);
 };
index 3f345e7c341aafa072235217b3c457b0b6785e09..d83fd2dcb776d134edd2bb84ff9cce4be8c2017b 100644 (file)
@@ -28,6 +28,55 @@ struct hdmi_connector {
 };
 #define to_hdmi_connector(x) container_of(x, struct hdmi_connector, base)
 
+static void hdmi_phy_reset(struct hdmi *hdmi)
+{
+       unsigned int val;
+
+       val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL);
+
+       if (val & HDMI_PHY_CTRL_SW_RESET_LOW) {
+               /* pull low */
+               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
+                               val & ~HDMI_PHY_CTRL_SW_RESET);
+       } else {
+               /* pull high */
+               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
+                               val | HDMI_PHY_CTRL_SW_RESET);
+       }
+
+       if (val & HDMI_PHY_CTRL_SW_RESET_PLL_LOW) {
+               /* pull low */
+               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
+                               val & ~HDMI_PHY_CTRL_SW_RESET_PLL);
+       } else {
+               /* pull high */
+               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
+                               val | HDMI_PHY_CTRL_SW_RESET_PLL);
+       }
+
+       msleep(100);
+
+       if (val & HDMI_PHY_CTRL_SW_RESET_LOW) {
+               /* pull high */
+               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
+                               val | HDMI_PHY_CTRL_SW_RESET);
+       } else {
+               /* pull low */
+               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
+                               val & ~HDMI_PHY_CTRL_SW_RESET);
+       }
+
+       if (val & HDMI_PHY_CTRL_SW_RESET_PLL_LOW) {
+               /* pull high */
+               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
+                               val | HDMI_PHY_CTRL_SW_RESET_PLL);
+       } else {
+               /* pull low */
+               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
+                               val & ~HDMI_PHY_CTRL_SW_RESET_PLL);
+       }
+}
+
 static int gpio_config(struct hdmi *hdmi, bool on)
 {
        struct device *dev = &hdmi->pdev->dev;
@@ -138,7 +187,6 @@ static int hpd_enable(struct hdmi_connector *hdmi_connector)
        struct hdmi *hdmi = hdmi_connector->hdmi;
        const struct hdmi_platform_config *config = hdmi->config;
        struct device *dev = &hdmi->pdev->dev;
-       struct hdmi_phy *phy = hdmi->phy;
        uint32_t hpd_ctrl;
        int i, ret;
        unsigned long flags;
@@ -182,7 +230,7 @@ static int hpd_enable(struct hdmi_connector *hdmi_connector)
        }
 
        hdmi_set_mode(hdmi, false);
-       phy->funcs->reset(phy);
+       hdmi_phy_reset(hdmi);
        hdmi_set_mode(hdmi, true);
 
        hdmi_write(hdmi, REG_HDMI_USEC_REFTIMER, 0x0001001b);
index 6997ec636c6d473413227f0701e3f1c72b94988c..3a01cb5051e2db05b7757ee95d3d994aa393b625 100644 (file)
@@ -426,57 +426,6 @@ static void hdmi_phy_8960_destroy(struct hdmi_phy *phy)
        kfree(phy_8960);
 }
 
-static void hdmi_phy_8960_reset(struct hdmi_phy *phy)
-{
-       struct hdmi_phy_8960 *phy_8960 = to_hdmi_phy_8960(phy);
-       struct hdmi *hdmi = phy_8960->hdmi;
-       unsigned int val;
-
-       val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL);
-
-       if (val & HDMI_PHY_CTRL_SW_RESET_LOW) {
-               /* pull low */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val & ~HDMI_PHY_CTRL_SW_RESET);
-       } else {
-               /* pull high */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val | HDMI_PHY_CTRL_SW_RESET);
-       }
-
-       if (val & HDMI_PHY_CTRL_SW_RESET_PLL_LOW) {
-               /* pull low */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val & ~HDMI_PHY_CTRL_SW_RESET_PLL);
-       } else {
-               /* pull high */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val | HDMI_PHY_CTRL_SW_RESET_PLL);
-       }
-
-       msleep(100);
-
-       if (val & HDMI_PHY_CTRL_SW_RESET_LOW) {
-               /* pull high */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val | HDMI_PHY_CTRL_SW_RESET);
-       } else {
-               /* pull low */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val & ~HDMI_PHY_CTRL_SW_RESET);
-       }
-
-       if (val & HDMI_PHY_CTRL_SW_RESET_PLL_LOW) {
-               /* pull high */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val | HDMI_PHY_CTRL_SW_RESET_PLL);
-       } else {
-               /* pull low */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val & ~HDMI_PHY_CTRL_SW_RESET_PLL);
-       }
-}
-
 static void hdmi_phy_8960_powerup(struct hdmi_phy *phy,
                unsigned long int pixclock)
 {
@@ -511,7 +460,6 @@ static void hdmi_phy_8960_powerdown(struct hdmi_phy *phy)
 
 static const struct hdmi_phy_funcs hdmi_phy_8960_funcs = {
                .destroy = hdmi_phy_8960_destroy,
-               .reset = hdmi_phy_8960_reset,
                .powerup = hdmi_phy_8960_powerup,
                .powerdown = hdmi_phy_8960_powerdown,
 };
index 391433c1af7c1d04b824384cbd44470f351494f0..cb01421ae1e4ba9db3df0cdc0997e4d6591c2147 100644 (file)
@@ -29,37 +29,6 @@ static void hdmi_phy_8x60_destroy(struct hdmi_phy *phy)
        kfree(phy_8x60);
 }
 
-static void hdmi_phy_8x60_reset(struct hdmi_phy *phy)
-{
-       struct hdmi_phy_8x60 *phy_8x60 = to_hdmi_phy_8x60(phy);
-       struct hdmi *hdmi = phy_8x60->hdmi;
-       unsigned int val;
-
-       val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL);
-
-       if (val & HDMI_PHY_CTRL_SW_RESET_LOW) {
-               /* pull low */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val & ~HDMI_PHY_CTRL_SW_RESET);
-       } else {
-               /* pull high */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val | HDMI_PHY_CTRL_SW_RESET);
-       }
-
-       msleep(100);
-
-       if (val & HDMI_PHY_CTRL_SW_RESET_LOW) {
-               /* pull high */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val | HDMI_PHY_CTRL_SW_RESET);
-       } else {
-               /* pull low */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val & ~HDMI_PHY_CTRL_SW_RESET);
-       }
-}
-
 static void hdmi_phy_8x60_powerup(struct hdmi_phy *phy,
                unsigned long int pixclock)
 {
@@ -182,7 +151,6 @@ static void hdmi_phy_8x60_powerdown(struct hdmi_phy *phy)
 
 static const struct hdmi_phy_funcs hdmi_phy_8x60_funcs = {
                .destroy = hdmi_phy_8x60_destroy,
-               .reset = hdmi_phy_8x60_reset,
                .powerup = hdmi_phy_8x60_powerup,
                .powerdown = hdmi_phy_8x60_powerdown,
 };
index 59fa6cdacb2aa9bd9d4e6de52f470510ea140a31..56ab8917ee9a353a7d497c0231fd9d5c07e2f768 100644 (file)
@@ -19,7 +19,6 @@
 
 struct hdmi_phy_8x74 {
        struct hdmi_phy base;
-       struct hdmi *hdmi;
        void __iomem *mmio;
 };
 #define to_hdmi_phy_8x74(x) container_of(x, struct hdmi_phy_8x74, base)
@@ -41,59 +40,6 @@ static void hdmi_phy_8x74_destroy(struct hdmi_phy *phy)
        kfree(phy_8x74);
 }
 
-static void hdmi_phy_8x74_reset(struct hdmi_phy *phy)
-{
-       struct hdmi_phy_8x74 *phy_8x74 = to_hdmi_phy_8x74(phy);
-       struct hdmi *hdmi = phy_8x74->hdmi;
-       unsigned int val;
-
-       /* NOTE that HDMI_PHY_CTL is in core mmio, not phy mmio: */
-
-       val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL);
-
-       if (val & HDMI_PHY_CTRL_SW_RESET_LOW) {
-               /* pull low */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val & ~HDMI_PHY_CTRL_SW_RESET);
-       } else {
-               /* pull high */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val | HDMI_PHY_CTRL_SW_RESET);
-       }
-
-       if (val & HDMI_PHY_CTRL_SW_RESET_PLL_LOW) {
-               /* pull low */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val & ~HDMI_PHY_CTRL_SW_RESET_PLL);
-       } else {
-               /* pull high */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val | HDMI_PHY_CTRL_SW_RESET_PLL);
-       }
-
-       msleep(100);
-
-       if (val & HDMI_PHY_CTRL_SW_RESET_LOW) {
-               /* pull high */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val | HDMI_PHY_CTRL_SW_RESET);
-       } else {
-               /* pull low */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val & ~HDMI_PHY_CTRL_SW_RESET);
-       }
-
-       if (val & HDMI_PHY_CTRL_SW_RESET_PLL_LOW) {
-               /* pull high */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val | HDMI_PHY_CTRL_SW_RESET_PLL);
-       } else {
-               /* pull low */
-               hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
-                               val & ~HDMI_PHY_CTRL_SW_RESET_PLL);
-       }
-}
-
 static void hdmi_phy_8x74_powerup(struct hdmi_phy *phy,
                unsigned long int pixclock)
 {
@@ -117,7 +63,6 @@ static void hdmi_phy_8x74_powerdown(struct hdmi_phy *phy)
 
 static const struct hdmi_phy_funcs hdmi_phy_8x74_funcs = {
                .destroy = hdmi_phy_8x74_destroy,
-               .reset = hdmi_phy_8x74_reset,
                .powerup = hdmi_phy_8x74_powerup,
                .powerdown = hdmi_phy_8x74_powerdown,
 };
@@ -138,8 +83,6 @@ struct hdmi_phy *hdmi_phy_8x74_init(struct hdmi *hdmi)
 
        phy->funcs = &hdmi_phy_8x74_funcs;
 
-       phy_8x74->hdmi = hdmi;
-
        /* for 8x74, the phy mmio is mapped separately: */
        phy_8x74->mmio = msm_ioremap(hdmi->pdev,
                        "phy_physical", "HDMI_8x74");