SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them

to denote this fact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11972 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp
index 2631114446a11465cbe54f1f35141e895741504f..9a78016f723777dc6590bdf8b59ea31411e94a9a 100644 (file)
--- a/lib/Target/X86/InstSelectSimple.cpp
+++ b/lib/Target/X86/InstSelectSimple.cpp
@@ -1776,10 +1776,10 @@ void ISel::emitShiftOperation(MachineBasicBlock *MBB,
   unsigned Class = getClass (ResultTy);
   
   static const unsigned ConstantOperand[][4] = {
-    { X86::SHRri8, X86::SHRri16, X86::SHRri32, X86::SHRDrri32 },  // SHR
-    { X86::SARri8, X86::SARri16, X86::SARri32, X86::SHRDrri32 },  // SAR
-    { X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrri32 },  // SHL
-    { X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrri32 },  // SAL = SHL
+    { X86::SHRri8, X86::SHRri16, X86::SHRri32, X86::SHRDrr32i8 },  // SHR
+    { X86::SARri8, X86::SARri16, X86::SARri32, X86::SHRDrr32i8 },  // SAR
+    { X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrr32i8 },  // SHL
+    { X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrr32i8 },  // SAL = SHL
   };
 
   static const unsigned NonConstantOperand[][4] = {

diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index 2631114446a11465cbe54f1f35141e895741504f..9a78016f723777dc6590bdf8b59ea31411e94a9a 100644 (file)
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -1776,10 +1776,10 @@ void ISel::emitShiftOperation(MachineBasicBlock *MBB,
   unsigned Class = getClass (ResultTy);
   
   static const unsigned ConstantOperand[][4] = {
-    { X86::SHRri8, X86::SHRri16, X86::SHRri32, X86::SHRDrri32 },  // SHR
-    { X86::SARri8, X86::SARri16, X86::SARri32, X86::SHRDrri32 },  // SAR
-    { X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrri32 },  // SHL
-    { X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrri32 },  // SAL = SHL
+    { X86::SHRri8, X86::SHRri16, X86::SHRri32, X86::SHRDrr32i8 },  // SHR
+    { X86::SARri8, X86::SARri16, X86::SARri32, X86::SHRDrr32i8 },  // SAR
+    { X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrr32i8 },  // SHL
+    { X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrr32i8 },  // SAL = SHL
   };
 
   static const unsigned NonConstantOperand[][4] = {

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 106f84087cd799332977d95c6b502e75a6d6a8a6..f85579b46c40e3daa75bb1f73dbc95390918728f 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -441,13 +441,13 @@ def SARmi32  : Im32i8<"sar", 0xC1, MRM7m     >;                 // [mem32] >>>=
 
 def SHLDrrCL32 : I   <"shld", 0xA5, MRMDestReg>, TB, UsesCL;    // R32 <<= R32,R32 cl
 def SHLDmrCL32 : I   <"shld", 0xA5, MRMDestMem>, TB, UsesCL;    // [mem32] <<= [mem32],R32 cl
-def SHLDrri32  : Ii8 <"shld", 0xA4, MRMDestReg>, TB;            // R32 <<= R32,R32 imm8
-def SHLDmri32  : Ii8 <"shld", 0xA4, MRMDestMem>, TB;            // [mem32] <<= [mem32],R32 imm8
+def SHLDrr32i8 : Ii8 <"shld", 0xA4, MRMDestReg>, TB;            // R32 <<= R32,R32 imm8
+def SHLDmr32i8 : Ii8 <"shld", 0xA4, MRMDestMem>, TB;            // [mem32] <<= [mem32],R32 imm8
 
 def SHRDrrCL32 : I   <"shrd", 0xAD, MRMDestReg>, TB, UsesCL;    // R32 >>= R32,R32 cl
 def SHRDmrCL32 : I   <"shrd", 0xAD, MRMDestMem>, TB, UsesCL;    // [mem32] >>= [mem32],R32 cl
-def SHRDrri32  : Ii8 <"shrd", 0xAC, MRMDestReg>, TB;            // R32 >>= R32,R32 imm8
-def SHRDmri32  : Ii8 <"shrd", 0xAC, MRMDestMem>, TB;            // [mem32] >>= [mem32],R32 imm8
+def SHRDrr32i8 : Ii8 <"shrd", 0xAC, MRMDestReg>, TB;            // R32 >>= R32,R32 imm8
+def SHRDmr32i8 : Ii8 <"shrd", 0xAC, MRMDestMem>, TB;            // [mem32] >>= [mem32],R32 imm8
 
 
 // Arithmetic...

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 323222a433f4e9f82b317c0d775ff7e6ecd9466e..fabb44029451e512abb0f64a0b95f669861de935 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -223,9 +223,9 @@ bool X86RegisterInfo::foldMemoryOperand(MachineBasicBlock::iterator &MI,
     case X86::SARri16: NI = MakeMIInst(X86::SARmi16, FrameIndex, MI); break;
     case X86::SARri32: NI = MakeMIInst(X86::SARmi32, FrameIndex, MI); break;
     case X86::SHLDrrCL32:NI = MakeMRInst( X86::SHLDmrCL32,FrameIndex, MI);break;
-    case X86::SHLDrri32: NI = MakeMRIInst(X86::SHLDmri32, FrameIndex, MI);break;
+    case X86::SHLDrr32i8:NI = MakeMRIInst(X86::SHLDmr32i8,FrameIndex, MI);break;
     case X86::SHRDrrCL32:NI = MakeMRInst( X86::SHRDmrCL32,FrameIndex, MI);break;
-    case X86::SHRDrri32: NI = MakeMRIInst(X86::SHRDmri32, FrameIndex, MI);break;
+    case X86::SHRDrr32i8:NI = MakeMRIInst(X86::SHRDmr32i8,FrameIndex, MI);break;
     case X86::SETBr:   NI = MakeMInst( X86::SETBm,   FrameIndex, MI); break;
     case X86::SETAEr:  NI = MakeMInst( X86::SETAEm,  FrameIndex, MI); break;
     case X86::SETEr:   NI = MakeMInst( X86::SETEm,   FrameIndex, MI); break;