std::vector<MCCFIInstruction> InitialFrameState;
- //===--- Integrated Assembler State ----------------------------------===//
+ //===--- Integrated Assembler Information ----------------------------===//
/// Should we use the integrated assembler?
/// The integrated assembler should be enabled by default (by the
/// Compress DWARF debug sections. Defaults to false.
bool CompressDebugSections;
+ /// True if the integrated assembler should interpret 'a >> b' constant
+ /// expressions as logical rather than arithmetic.
+ bool UseLogicalShr;
+
public:
explicit MCAsmInfo();
virtual ~MCAsmInfo();
void setCompressDebugSections(bool CompressDebugSections) {
this->CompressDebugSections = CompressDebugSections;
}
+
+ bool shouldUseLogicalShr() const { return UseLogicalShr; }
};
}
NE, ///< Inequality comparison.
Or, ///< Bitwise or.
Shl, ///< Shift left.
- Shr, ///< Shift right (arithmetic or logical, depending on target)
+ AShr, ///< Arithmetic shift right.
+ LShr, ///< Logical shift right.
Sub, ///< Subtraction.
Xor ///< Bitwise exclusive or.
};
MCContext &Ctx) {
return Create(Shl, LHS, RHS, Ctx);
}
- static const MCBinaryExpr *CreateShr(const MCExpr *LHS, const MCExpr *RHS,
+ static const MCBinaryExpr *CreateAShr(const MCExpr *LHS, const MCExpr *RHS,
MCContext &Ctx) {
- return Create(Shr, LHS, RHS, Ctx);
+ return Create(AShr, LHS, RHS, Ctx);
+ }
+ static const MCBinaryExpr *CreateLShr(const MCExpr *LHS, const MCExpr *RHS,
+ MCContext &Ctx) {
+ return Create(LShr, LHS, RHS, Ctx);
}
static const MCBinaryExpr *CreateSub(const MCExpr *LHS, const MCExpr *RHS,
MCContext &Ctx) {
DwarfRegNumForCFI = false;
NeedsDwarfSectionOffsetDirective = false;
UseParensForSymbolVariant = false;
+ UseLogicalShr = false;
// FIXME: Clang's logic should be synced with the logic used to initialize
// this member and the two implementations should be merged.
OS << '+';
break;
+ case MCBinaryExpr::AShr: OS << ">>"; break;
case MCBinaryExpr::And: OS << '&'; break;
case MCBinaryExpr::Div: OS << '/'; break;
case MCBinaryExpr::EQ: OS << "=="; break;
case MCBinaryExpr::GTE: OS << ">="; break;
case MCBinaryExpr::LAnd: OS << "&&"; break;
case MCBinaryExpr::LOr: OS << "||"; break;
+ case MCBinaryExpr::LShr: OS << ">>"; break;
case MCBinaryExpr::LT: OS << '<'; break;
case MCBinaryExpr::LTE: OS << "<="; break;
case MCBinaryExpr::Mod: OS << '%'; break;
case MCBinaryExpr::NE: OS << "!="; break;
case MCBinaryExpr::Or: OS << '|'; break;
case MCBinaryExpr::Shl: OS << "<<"; break;
- case MCBinaryExpr::Shr: OS << ">>"; break;
case MCBinaryExpr::Sub: OS << '-'; break;
case MCBinaryExpr::Xor: OS << '^'; break;
}
}
// FIXME: We need target hooks for the evaluation. It may be limited in
- // width, and gas defines the result of comparisons and right shifts
- // differently from Apple as.
+ // width, and gas defines the result of comparisons differently from
+ // Apple as.
int64_t LHS = LHSValue.getConstant(), RHS = RHSValue.getConstant();
int64_t Result = 0;
switch (ABE->getOpcode()) {
+ case MCBinaryExpr::AShr: Result = LHS >> RHS; break;
case MCBinaryExpr::Add: Result = LHS + RHS; break;
case MCBinaryExpr::And: Result = LHS & RHS; break;
case MCBinaryExpr::Div: Result = LHS / RHS; break;
case MCBinaryExpr::GTE: Result = LHS >= RHS; break;
case MCBinaryExpr::LAnd: Result = LHS && RHS; break;
case MCBinaryExpr::LOr: Result = LHS || RHS; break;
+ case MCBinaryExpr::LShr: Result = uint64_t(LHS) >> uint64_t(RHS); break;
case MCBinaryExpr::LT: Result = LHS < RHS; break;
case MCBinaryExpr::LTE: Result = LHS <= RHS; break;
case MCBinaryExpr::Mod: Result = LHS % RHS; break;
case MCBinaryExpr::NE: Result = LHS != RHS; break;
case MCBinaryExpr::Or: Result = LHS | RHS; break;
case MCBinaryExpr::Shl: Result = LHS << RHS; break;
- case MCBinaryExpr::Shr: Result = LHS >> RHS; break;
case MCBinaryExpr::Sub: Result = LHS - RHS; break;
case MCBinaryExpr::Xor: Result = LHS ^ RHS; break;
}
Kind = MCBinaryExpr::Shl;
return 4;
case AsmToken::GreaterGreater:
- Kind = MCBinaryExpr::Shr;
+ Kind = MAI.shouldUseLogicalShr() ? MCBinaryExpr::LShr : MCBinaryExpr::AShr;
return 4;
// High Intermediate Precedence: +, -