\r
\r
extern void __rb( void* );\r
-void rb( void )\r
+static void rb( void )\r
{\r
void(*cb)(void* ) ;\r
\r
cb( uart_base );\r
}\r
\r
+static volatile u32 __sramdata reboot_reason = 0;\r
static void __sramfunc __noreturn rk29_rb_with_softreset(void)\r
{\r
u32 reg;\r
+ u32 reason = __raw_readl((u32)&reboot_reason - SRAM_CODE_OFFSET + 0x10130000);\r
\r
asm volatile (\r
"mrc p15, 0, %0, c1, c0, 0\n\t"\r
dsb();\r
LOOP(10 * LOOPS_PER_USEC);\r
\r
+ if (reason) {\r
+ __raw_writel(0, RK29_TIMER0_PHYS + 0x8);\r
+ __raw_writel(reason, RK29_TIMER0_PHYS + 0x0);\r
+ }\r
+\r
asm volatile (\r
"b 1f\n\t"\r
".align 5\n\t"\r
while (1);\r
}\r
\r
-void rk29_arch_reset(int mode, const char *cmd)\r
+void rk29_arch_reset(int mode, const char *cmd)\r
{\r
void (*rb2)(void);\r
\r
+ if (cmd) {\r
+ if (!strcmp(cmd, "loader"))\r
+ reboot_reason = 0x1888AAFF;\r
+ }\r
+\r
rb2 = (void(*)(void))((u32)rk29_rb_with_softreset - SRAM_CODE_OFFSET + 0x10130000);\r
\r
local_irq_disable();\r