add nand config in dts
authorZhaoyifeng <zyf@rock-chips.com>
Mon, 21 Jul 2014 11:30:07 +0000 (19:30 +0800)
committerZhaoyifeng <zyf@rock-chips.com>
Mon, 21 Jul 2014 11:30:07 +0000 (19:30 +0800)
arch/arm/boot/dts/rk3126-sdk.dts [changed mode: 0644->0755]
arch/arm/boot/dts/rk312x.dtsi

old mode 100644 (file)
new mode 100755 (executable)
index f4f93a4..55349fe
@@ -7,4 +7,11 @@
        fiq-debugger {
                status = "okay";
        };
+       &nandc {
+               status = "okay"; // used nand set "okay" ,used emmc set "disabled"
+       };  
+
+       &nandc0reg {
+               status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
+       };
     };
index 49779776fbaf437850cf9036870b12b0a9f8ae51..62e75e6f54c6cfbe12e86bcf58c8b34d411133bf 100755 (executable)
                };
        };
 
+
+       nandc: nandc@10500000 {
+               compatible = "rockchip,rk-nandc";
+               reg = <0x10500000 0x4000>;
+               interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+               //pinctrl-names = "default";
+               //pinctrl-0 = <&nandc_ale &nandc_cle &nandc_wrn &nandc_rdn &nandc_rdy &nandc_cs0 &nandc_data>;
+               nandc_id = <0>;
+               clocks = <&clk_nandc>, <&clk_gates5 9>, <&clk_gates10 15>;
+               clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";
+       };
+       
+       nandc0reg: nandc0@10500000 {
+               compatible = "rockchip,rk-nandc";
+               reg = <0x10500000 0x4000>;
+       };
        uart0: serial@20060000 {
                compatible = "rockchip,serial";
                reg = <0x20060000 0x100>;