ARM: Align functions containing Thumb-2 jump tables to 4 bytes.

Functions with jump tables need an alignment of 4 because they use the ADR
instruction, which aligns the PC to 4 bytes before adding an offset.

Differential Revision: http://reviews.llvm.org/D9424

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236327 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp
index e6d4b14a2628ef83237647637d5565fb53e8e4f1..0a47400c490d97cad8bdc7b5aa49b97fd1c84472 100644 (file)
--- a/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ b/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -423,6 +423,10 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &mf) {
   CPEMIs.clear();
   DEBUG(dumpBBs());
 
+  // Functions with jump tables need an alignment of 4 because they use the ADR
+  // instruction, which aligns the PC to 4 bytes before adding an offset.
+  if (!T2JumpTables.empty())
+    MF->ensureAlignment(2);
 
   /// Remove dead constant pool entries.
   MadeChange |= removeUnusedCPEntries();

diff --git a/test/CodeGen/ARM/thumb-alignment.ll b/test/CodeGen/ARM/thumb-alignment.ll
index d25650987989df6014387146a9605719b541590c..c11d4b6da3c994d6ff06ed39245a0b5b4a388ae8 100644 (file)
--- a/test/CodeGen/ARM/thumb-alignment.ll
+++ b/test/CodeGen/ARM/thumb-alignment.ll
@@ -13,3 +13,42 @@ define i32* @foo() {
 define i32* @bar() {
   ret i32* zeroinitializer
 }
+
+@a = external global i32
+@b = external global i32
+@c = external global i32
+@d = external global i32
+
+; Create a Thumb-2 jump table, which should force alignment to 4 bytes.
+
+; CHECK: .globl        baz
+; CHECK-NEXT: .align   2
+; CHECK: adr.w
+define i32 @baz() {
+  %1 = load i32, i32* @c, align 4
+  switch i32 %1, label %7 [
+    i32 1, label %2
+    i32 4, label %5
+    i32 9, label %5
+    i32 3, label %8
+  ]
+
+; <label>:2
+  %3 = load i32, i32* @a, align 4
+  %4 = tail call i32 bitcast (i32 (...)* @fn2 to i32 (i32 (...)*, i32, i32)*)(i32 (...)* bitcast (i32 ()* @baz to i32 (...)*), i32 0, i32 %3) #2
+  br label %8
+
+; <label>:5
+  %6 = load i32, i32* @d, align 4
+  store i32 %6, i32* @b, align 4
+  br label %8
+
+; <label>:7
+  br label %8
+
+; <label>:8
+  %e.0 = phi i32 [ 1, %7 ], [ 1, %2 ], [ 0, %0 ], [ 0, %5 ]
+  ret i32 %e.0
+}
+
+declare i32 @fn2(...)