drm/i915: Specify when the PLL hw state fields are valid
authorDamien Lespiau <damien.lespiau@intel.com>
Tue, 29 Jul 2014 17:06:16 +0000 (18:06 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 8 Aug 2014 15:43:33 +0000 (17:43 +0200)
Not all those fields are valid on a given platform. Make it explicit.

Unions could also be used, but were cluttering some code paths with
if/else ladders.

v2: Don't use anonymous unions (Daniel)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.h

index c70b2b67282e4214d66402ccfe4587835e77e7e6..c3beb08813c6be9c7536ee408e588dcdd42dbe66 100644 (file)
@@ -197,10 +197,13 @@ enum intel_dpll_id {
 #define I915_NUM_PLLS 2
 
 struct intel_dpll_hw_state {
+       /* i9xx, pch plls */
        uint32_t dpll;
        uint32_t dpll_md;
        uint32_t fp0;
        uint32_t fp1;
+
+       /* hsw, bdw */
        uint32_t wrpll;
 };