#define PMEM_GPU_SIZE SZ_64M\r
#define PMEM_UI_SIZE SZ_32M\r
#define PMEM_VPU_SIZE SZ_64M\r
-#define PMEM_CAM_SIZE 0x00c00000\r
+#define PMEM_CAM_SIZE 0x01300000\r
#ifdef CONFIG_VIDEO_RK29_WORK_IPP\r
#define MEM_CAMIPP_SIZE SZ_4M\r
#else\r
\r
extern struct sys_timer rk29_timer;\r
\r
-#define NAND_CS_MAX_NUM 1 /*form 0 to 8, it is 0 when no nand flash */\r
int rk29_nand_io_init(void)\r
{\r
-#if (NAND_CS_MAX_NUM == 2)
- rk29_mux_api_set(GPIO0D2_FLASHCSN1_NAME, GPIO0H_FLASH_CSN1);\r
-#elif (NAND_CS_MAX_NUM == 3)
- rk29_mux_api_set(GPIO0D2_FLASHCSN1_NAME, GPIO0H_FLASH_CSN1);\r
- rk29_mux_api_set(GPIO0D3_FLASHCSN2_NAME, GPIO0H_FLASH_CSN2);\r
-#elif (NAND_CS_MAX_NUM == 4)
- rk29_mux_api_set(GPIO0D2_FLASHCSN1_NAME, GPIO0H_FLASH_CSN1);\r
- rk29_mux_api_set(GPIO0D3_FLASHCSN2_NAME, GPIO0H_FLASH_CSN2);\r
- rk29_mux_api_set(GPIO0D4_FLASHCSN3_NAME, GPIO0H_FLASH_CSN3);\r
-#elif (NAND_CS_MAX_NUM == 5) \r
- rk29_mux_api_set(GPIO0D2_FLASHCSN1_NAME, GPIO0H_FLASH_CSN1);\r
- rk29_mux_api_set(GPIO0D3_FLASHCSN2_NAME, GPIO0H_FLASH_CSN2);\r
- rk29_mux_api_set(GPIO0D4_FLASHCSN3_NAME, GPIO0H_FLASH_CSN3);\r
- rk29_mux_api_set(GPIO0D5_FLASHCSN4_NAME, GPIO0H_FLASH_CSN4); \r
-#elif (NAND_CS_MAX_NUM == 6)\r
- rk29_mux_api_set(GPIO0D2_FLASHCSN1_NAME, GPIO0H_FLASH_CSN1);\r
- rk29_mux_api_set(GPIO0D3_FLASHCSN2_NAME, GPIO0H_FLASH_CSN2);\r
- rk29_mux_api_set(GPIO0D4_FLASHCSN3_NAME, GPIO0H_FLASH_CSN3);\r
- rk29_mux_api_set(GPIO0D5_FLASHCSN4_NAME, GPIO0H_FLASH_CSN4); \r
- rk29_mux_api_set(GPIO0D6_FLASHCSN5_NAME, GPIO0H_FLASH_CSN5); \r
-#elif (NAND_CS_MAX_NUM == 7)\r
- rk29_mux_api_set(GPIO0D2_FLASHCSN1_NAME, GPIO0H_FLASH_CSN1);\r
- rk29_mux_api_set(GPIO0D3_FLASHCSN2_NAME, GPIO0H_FLASH_CSN2);\r
- rk29_mux_api_set(GPIO0D4_FLASHCSN3_NAME, GPIO0H_FLASH_CSN3);\r
- rk29_mux_api_set(GPIO0D5_FLASHCSN4_NAME, GPIO0H_FLASH_CSN4); \r
- rk29_mux_api_set(GPIO0D6_FLASHCSN5_NAME, GPIO0H_FLASH_CSN5); \r
- rk29_mux_api_set(GPIO0D7_FLASHCSN6_NAME, GPIO0H_FLASH_CSN6); \r
-#elif (NAND_CS_MAX_NUM == 8)\r
- rk29_mux_api_set(GPIO0D2_FLASHCSN1_NAME, GPIO0H_FLASH_CSN1);\r
- rk29_mux_api_set(GPIO0D3_FLASHCSN2_NAME, GPIO0H_FLASH_CSN2);\r
- rk29_mux_api_set(GPIO0D4_FLASHCSN3_NAME, GPIO0H_FLASH_CSN3);\r
- rk29_mux_api_set(GPIO0D5_FLASHCSN4_NAME, GPIO0H_FLASH_CSN4); \r
- rk29_mux_api_set(GPIO0D6_FLASHCSN5_NAME, GPIO0H_FLASH_CSN5); \r
- rk29_mux_api_set(GPIO0D7_FLASHCSN6_NAME, GPIO0H_FLASH_CSN6); \r
- rk29_mux_api_set(GPIO1A0_FLASHCS7_MDDRTQ_NAME, GPIO1L_FLASH_CS7); \r
-#endif\r
return 0;\r
}\r
\r
gpio_direction_output(TOUCH_INT_PIN, 0); \r
gpio_set_value(TOUCH_INT_PIN,GPIO_LOW); \r
\r
- msleep(100); //msleep(3000); \r
+ msleep(100); \r
gpio_set_value(TOUCH_PWR_PIN,GPIO_HIGH); \r
msleep(100); \r
\r
} else {\r
gpio_set_value(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
//printk("\n%s..%s..PowerPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
+ msleep(100);\r
}\r
}\r
\r
rk29_gpio_irq_setup();\r
}\r
#define POWER_ON_PIN RK29_PIN4_PA4\r
+static void rk29_pm_power_off(void)\r
+{\r
+ printk(KERN_ERR "rk29_pm_power_off start...\n");\r
+ \r
+ gpio_direction_output(POWER_ON_PIN, GPIO_LOW);\r
+ while(1);\r
+}\r
+\r
static void __init machine_rk29_board_init(void)\r
{\r
rk29_board_iomux_init();\r
gpio_request(POWER_ON_PIN,"poweronpin"); \r
gpio_set_value(POWER_ON_PIN, GPIO_HIGH);\r
gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);\r
+ pm_power_off = rk29_pm_power_off;\r
#ifdef CONFIG_WIFI_CONTROL_FUNC
rk29sdk_wifi_bt_gpio_control_init();