ARM: mvebu: Relocate Armada 370/XP DeviceBus device tree nodes
authorEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Fri, 26 Jul 2013 13:17:59 +0000 (10:17 -0300)
committerJason Cooper <jason@lakedaemon.net>
Tue, 6 Aug 2013 14:11:23 +0000 (14:11 +0000)
Now that mbus has been added to the device tree, it's possible to
move the DeviceBus out of internal registers, placing it directly
below the mbus. This is a more accurate representation of the hardware.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arch/arm/boot/dts/armada-370-xp.dtsi
arch/arm/boot/dts/armada-xp-db.dts
arch/arm/boot/dts/armada-xp-gp.dts
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts

index 62639b4a61f97735773598233426102a3c13bcbd..073dd203a819bc8f428a5fdd121ed33ff8ea1281 100644 (file)
                controller = <&mbusc>;
                interrupt-parent = <&mpic>;
 
+               devbus-bootcs {
+                       compatible = "marvell,mvebu-devbus";
+                       reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
+                       ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       clocks = <&coreclk 0>;
+                       status = "disabled";
+               };
+
+               devbus-cs0 {
+                       compatible = "marvell,mvebu-devbus";
+                       reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
+                       ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       clocks = <&coreclk 0>;
+                       status = "disabled";
+               };
+
+               devbus-cs1 {
+                       compatible = "marvell,mvebu-devbus";
+                       reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
+                       ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       clocks = <&coreclk 0>;
+                       status = "disabled";
+               };
+
+               devbus-cs2 {
+                       compatible = "marvell,mvebu-devbus";
+                       reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
+                       ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       clocks = <&coreclk 0>;
+                       status = "disabled";
+               };
+
+               devbus-cs3 {
+                       compatible = "marvell,mvebu-devbus";
+                       reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
+                       ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       clocks = <&coreclk 0>;
+                       status = "disabled";
+               };
+
                internal-regs {
                        compatible = "simple-bus";
                        #address-cells = <1>;
                                status = "disabled";
                        };
 
-                       devbus-bootcs@10400 {
-                               compatible = "marvell,mvebu-devbus";
-                               reg = <0x10400 0x8>;
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-                               clocks = <&coreclk 0>;
-                               status = "disabled";
-                       };
-
-                       devbus-cs0@10408 {
-                               compatible = "marvell,mvebu-devbus";
-                               reg = <0x10408 0x8>;
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-                               clocks = <&coreclk 0>;
-                               status = "disabled";
-                       };
-
-                       devbus-cs1@10410 {
-                               compatible = "marvell,mvebu-devbus";
-                               reg = <0x10410 0x8>;
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-                               clocks = <&coreclk 0>;
-                               status = "disabled";
-                       };
-
-                       devbus-cs2@10418 {
-                               compatible = "marvell,mvebu-devbus";
-                               reg = <0x10418 0x8>;
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-                               clocks = <&coreclk 0>;
-                               status = "disabled";
-                       };
-
-                       devbus-cs3@10420 {
-                               compatible = "marvell,mvebu-devbus";
-                               reg = <0x10420 0x8>;
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-                               clocks = <&coreclk 0>;
-                               status = "disabled";
-                       };
                };
        };
  };
index 857f27214a7b0dea39f085a01b4d5ad4ae2e969f..76ae1a95111bf287b37df39671ac1e0928ff8d63 100644 (file)
 
        soc {
                ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
-                         MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
+                         MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
+                         MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;
+
+               devbus-bootcs {
+                       status = "okay";
+
+                       /* Device Bus parameters are required */
+
+                       /* Read parameters */
+                       devbus,bus-width    = <8>;
+                       devbus,turn-off-ps  = <60000>;
+                       devbus,badr-skew-ps = <0>;
+                       devbus,acc-first-ps = <124000>;
+                       devbus,acc-next-ps  = <248000>;
+                       devbus,rd-setup-ps  = <0>;
+                       devbus,rd-hold-ps   = <0>;
+
+                       /* Write parameters */
+                       devbus,sync-enable = <0>;
+                       devbus,wr-high-ps  = <60000>;
+                       devbus,wr-low-ps   = <60000>;
+                       devbus,ale-wr-ps   = <60000>;
+
+                       /* NOR 16 MiB */
+                       nor@0 {
+                               compatible = "cfi-flash";
+                               reg = <0 0x1000000>;
+                               bank-width = <2>;
+                       };
+               };
 
                internal-regs {
                        serial@12000 {
                                };
                        };
 
-                       devbus-bootcs@10400 {
-                               status = "okay";
-                               ranges = <0 0xf0000000 0x1000000>;
-
-                               /* Device Bus parameters are required */
-
-                               /* Read parameters */
-                               devbus,bus-width    = <8>;
-                               devbus,turn-off-ps  = <60000>;
-                               devbus,badr-skew-ps = <0>;
-                               devbus,acc-first-ps = <124000>;
-                               devbus,acc-next-ps  = <248000>;
-                               devbus,rd-setup-ps  = <0>;
-                               devbus,rd-hold-ps   = <0>;
-
-                               /* Write parameters */
-                               devbus,sync-enable = <0>;
-                               devbus,wr-high-ps  = <60000>;
-                               devbus,wr-low-ps   = <60000>;
-                               devbus,ale-wr-ps   = <60000>;
-
-                               /* NOR 16 MiB */
-                               nor@0 {
-                                       compatible = "cfi-flash";
-                                       reg = <0 0x1000000>;
-                                       bank-width = <2>;
-                               };
-                       };
                };
        };
 };
index 934dc46645dbb8cfb516fc3023f084f5d925ee27..8c0de201c65b670d48c6f1de753528f71773877a 100644 (file)
 
        soc {
                ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
-                         MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
+                         MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
+                         MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;
+
+               devbus-bootcs {
+                       status = "okay";
+
+                       /* Device Bus parameters are required */
+
+                       /* Read parameters */
+                       devbus,bus-width    = <8>;
+                       devbus,turn-off-ps  = <60000>;
+                       devbus,badr-skew-ps = <0>;
+                       devbus,acc-first-ps = <124000>;
+                       devbus,acc-next-ps  = <248000>;
+                       devbus,rd-setup-ps  = <0>;
+                       devbus,rd-hold-ps   = <0>;
+
+                       /* Write parameters */
+                       devbus,sync-enable = <0>;
+                       devbus,wr-high-ps  = <60000>;
+                       devbus,wr-low-ps   = <60000>;
+                       devbus,ale-wr-ps   = <60000>;
+
+                       /* NOR 16 MiB */
+                       nor@0 {
+                               compatible = "cfi-flash";
+                               reg = <0 0x1000000>;
+                               bank-width = <2>;
+                       };
+               };
 
                internal-regs {
                        serial@12000 {
                                };
                        };
 
-                       devbus-bootcs@10400 {
-                               status = "okay";
-                               ranges = <0 0xf0000000 0x1000000>; /* @addr 0xf000000, size 0x1000000 */
-
-                               /* Device Bus parameters are required */
-
-                               /* Read parameters */
-                               devbus,bus-width    = <8>;
-                               devbus,turn-off-ps  = <60000>;
-                               devbus,badr-skew-ps = <0>;
-                               devbus,acc-first-ps = <124000>;
-                               devbus,acc-next-ps  = <248000>;
-                               devbus,rd-setup-ps  = <0>;
-                               devbus,rd-hold-ps   = <0>;
-
-                               /* Write parameters */
-                               devbus,sync-enable = <0>;
-                               devbus,wr-high-ps  = <60000>;
-                               devbus,wr-low-ps   = <60000>;
-                               devbus,ale-wr-ps   = <60000>;
-
-                               /* NOR 16 MiB */
-                               nor@0 {
-                                       compatible = "cfi-flash";
-                                       reg = <0 0x1000000>;
-                                       bank-width = <2>;
-                               };
-                       };
-
                        pcie-controller {
                                status = "okay";
 
index 1700f6fd612749ff09c0857b524ecc932f8ee68c..2b60ee08ef9f56cb0d1ee3ced8dcf92690573990 100644 (file)
 
        soc {
                ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
-                         MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
+                         MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
+                         MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000>;
+
+               devbus-bootcs {
+                       status = "okay";
+
+                       /* Device Bus parameters are required */
+
+                       /* Read parameters */
+                       devbus,bus-width    = <8>;
+                       devbus,turn-off-ps  = <60000>;
+                       devbus,badr-skew-ps = <0>;
+                       devbus,acc-first-ps = <124000>;
+                       devbus,acc-next-ps  = <248000>;
+                       devbus,rd-setup-ps  = <0>;
+                       devbus,rd-hold-ps   = <0>;
+
+                       /* Write parameters */
+                       devbus,sync-enable = <0>;
+                       devbus,wr-high-ps  = <60000>;
+                       devbus,wr-low-ps   = <60000>;
+                       devbus,ale-wr-ps   = <60000>;
+
+                       /* NOR 128 MiB */
+                       nor@0 {
+                               compatible = "cfi-flash";
+                               reg = <0 0x8000000>;
+                               bank-width = <2>;
+                       };
+               };
 
                internal-regs {
                        serial@12000 {
                                status = "okay";
                        };
 
-                       /* USB interface in the mini-PCIe connector */
-                       usb@52000 {
-                               status = "okay";
-                       };
-
-                       devbus-bootcs@10400 {
-                               status = "okay";
-                               ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */
-
-                               /* Device Bus parameters are required */
-
-                               /* Read parameters */
-                               devbus,bus-width    = <8>;
-                               devbus,turn-off-ps  = <60000>;
-                               devbus,badr-skew-ps = <0>;
-                               devbus,acc-first-ps = <124000>;
-                               devbus,acc-next-ps  = <248000>;
-                               devbus,rd-setup-ps  = <0>;
-                               devbus,rd-hold-ps   = <0>;
-
-                               /* Write parameters */
-                               devbus,sync-enable = <0>;
-                               devbus,wr-high-ps  = <60000>;
-                               devbus,wr-low-ps   = <60000>;
-                               devbus,ale-wr-ps   = <60000>;
-
-                               /* NOR 128 MiB */
-                               nor@0 {
-                                       compatible = "cfi-flash";
-                                       reg = <0 0x8000000>;
-                                       bank-width = <2>;
-                               };
-                       };
-
                        pcie-controller {
                                status = "okay";
                                /* Internal mini-PCIe connector */