StructurizeCFG pass allows to make complex cfg reducible ; it allows a lot of
shader from shadertoy (which exhibits complex control flow constructs) to works
correctly with respect to CFG handling (and allow us to detect potential bug in
other part of the backend).
We provide a cmd line argument to disable the pass for debug purpose.
Patch by: Vincent Lejeune
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192363
91177308-0d34-0410-b5e6-
96231b3b80d8
"true",
"Dump MachineInstrs in the CodeEmitter">;
+def FeatureIRStructurizer : SubtargetFeature <"EnableIRStructurizer",
+ "EnableIRStructurizer",
+ "true",
+ "Enable IR Structurizer">;
+
// Target features
def FeatureFP64 : SubtargetFeature<"fp64",
Gen = AMDGPUSubtarget::R600;
FP64 = false;
CaymanISA = false;
+ EnableIRStructurizer = false;
ParseSubtargetFeatures(GPU, FS);
DevName = GPU;
}
return CaymanISA;
}
bool
+AMDGPUSubtarget::IsIRStructurizerEnabled() const {
+ return EnableIRStructurizer;
+}
+bool
AMDGPUSubtarget::isTargetELF() const {
return false;
}
enum Generation Gen;
bool FP64;
bool CaymanISA;
+ bool EnableIRStructurizer;
InstrItineraryData InstrItins;
enum Generation getGeneration() const;
bool hasHWFP64() const;
bool hasCaymanISA() const;
+ bool IsIRStructurizerEnabled() const;
virtual bool enableMachineScheduler() const {
return getGeneration() <= NORTHERN_ISLANDS;
#include "llvm/Transforms/Scalar.h"
#include <llvm/CodeGen/Passes.h>
+
using namespace llvm;
extern "C" void LLVMInitializeR600Target() {
AMDGPUPassConfig::addPreISel() {
const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
addPass(createFlattenCFGPass());
+ if (ST.IsIRStructurizerEnabled() ||
+ ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS)
+ addPass(createStructurizeCFGPass());
if (ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
addPass(createSITypeRewriter());
- addPass(createStructurizeCFGPass());
addPass(createSIAnnotateControlFlowPass());
} else {
addPass(createR600TextureIntrinsicsReplacer());
switch (MI->getOpcode()) {
case AMDGPU::KILL:
case AMDGPU::RETURN:
+ case AMDGPU::IMPLICIT_DEF:
return true;
default:
return false;
MachineBasicBlock::iterator End = MBB->end();
MachineBasicBlock::iterator MI = MBB->begin();
while (MI != End) {
- if (MI->isKill() ||
+ if (MI->isKill() || MI->getOpcode() == AMDGPU::IMPLICIT_DEF ||
(MI->getOpcode() == AMDGPU::CF_ALU && !MI->getOperand(8).getImm())) {
MachineBasicBlock::iterator DeleteMI = MI;
++MI;