rk3288 dts: modify lcdc0 as prmry(LCD) and lcdc1 as extend(HDMI) that just used for MID

diff --git a/arch/arm/boot/dts/rk3288-chrome.dts b/arch/arm/boot/dts/rk3288-chrome.dts
index 2ca87dbcbab861ac8fa307688c1e97ed95019b90..fb6326c40652798cf1967272ffa772c659e1bf18 100755 (executable)
--- a/arch/arm/boot/dts/rk3288-chrome.dts
+++ b/arch/arm/boot/dts/rk3288-chrome.dts
@@ -476,8 +476,8 @@
         display-timings = <&disp_timings>;
 };
 
-/*lcdc1 as PRMRY(LCD),lcdc0 as EXTEND(HDMI)*/
-&lcdc1 {
+/*lcdc0 as PRMRY(LCD),lcdc1 as EXTEND(HDMI)*/
+&lcdc0 {
        status = "okay";
        rockchip,mirror = <NO_MIRROR>;
        rockchip,cabc_mode = <0>;
@@ -504,8 +504,9 @@
        };
 };
 
-&lcdc0 {
+&lcdc1 {
        status = "okay";
+       rockchip,mirror = <NO_MIRROR>;
 };
 
 &hdmi {

diff --git a/arch/arm/boot/dts/rk3288-p977.dts b/arch/arm/boot/dts/rk3288-p977.dts
index 9fb25cfeaa8acf391bfc9be941048d40672dac07..aea86f790bb37807875a7cf81db5eb22ce58e373 100755 (executable)
--- a/arch/arm/boot/dts/rk3288-p977.dts
+++ b/arch/arm/boot/dts/rk3288-p977.dts
@@ -446,8 +446,8 @@
         display-timings = <&disp_timings>;
 };
 
-/*lcdc1 as PRMRY(LCD),lcdc0 as EXTEND(HDMI)*/
-&lcdc1 {
+/*lcdc0 as PRMRY(LCD),lcdc1 as EXTEND(HDMI)*/
+&lcdc0 {
        status = "okay";
        rockchip,mirror = <NO_MIRROR>;
        rockchip,cabc_mode = <0>;
@@ -474,8 +474,9 @@
        };
 };
 
-&lcdc0 {
+&lcdc1 {
        status = "okay";
+       rockchip,mirror = <NO_MIRROR>;
 };
 
 &hdmi {

diff --git a/arch/arm/boot/dts/rk3288-p977_8846.dts b/arch/arm/boot/dts/rk3288-p977_8846.dts
index b1dd447b7c60a936a8863596fca8eabcc99a7e8c..26a26576d8c09c019db1dbb0822b51222ba98719 100755 (executable)
--- a/arch/arm/boot/dts/rk3288-p977_8846.dts
+++ b/arch/arm/boot/dts/rk3288-p977_8846.dts
@@ -505,8 +505,8 @@
         display-timings = <&disp_timings>;
 };
 
-/*lcdc1 as PRMRY(LCD),lcdc0 as EXTEND(HDMI)*/
-&lcdc1 {
+/*lcdc0 as PRMRY(LCD),lcdc1 as EXTEND(HDMI)*/
+&lcdc0 {
        status = "okay";
        rockchip,mirror = <NO_MIRROR>;
        rockchip,cabc_mode = <0>;
@@ -533,8 +533,9 @@
        };
 };
 
-&lcdc0 {
+&lcdc1 {
        status = "okay";
+       rockchip,mirror = <NO_MIRROR>;
 };
 
 &hdmi {

diff --git a/arch/arm/boot/dts/rk3288-tb.dts b/arch/arm/boot/dts/rk3288-tb.dts
index 87f1eb498a1038b05df28d705b81c8f4f426e2f0..53799123cc604f631bb88da348196687e661ef67 100755 (executable)
--- a/arch/arm/boot/dts/rk3288-tb.dts
+++ b/arch/arm/boot/dts/rk3288-tb.dts
@@ -587,8 +587,8 @@
         display-timings = <&disp_timings>;
 };
 
-/*lcdc1 as PRMRY(LCD),lcdc0 as EXTEND(HDMI)*/
-&lcdc1 {
+/*lcdc0 as PRMRY(LCD),lcdc1 as EXTEND(HDMI)*/
+&lcdc0 {
        status = "okay";
        rockchip,mirror = <NO_MIRROR>;
        rockchip,cabc_mode = <0>;
@@ -615,8 +615,9 @@
        };
 };
 
-&lcdc0 {
+&lcdc1 {
        status = "okay";
+       rockchip,mirror = <NO_MIRROR>;
 };
 
 &hdmi {

diff --git a/arch/arm/boot/dts/rk3288-tesco.dts b/arch/arm/boot/dts/rk3288-tesco.dts
index 69d7db985b9926b944ba6f4b3d09100853f23986..21e5ecf4bda771d84b7e3b2d021d8bff077d5bd7 100755 (executable)
--- a/arch/arm/boot/dts/rk3288-tesco.dts
+++ b/arch/arm/boot/dts/rk3288-tesco.dts
@@ -442,8 +442,8 @@
         display-timings = <&disp_timings>;
 };
 
-/*lcdc1 as PRMRY(LCD),lcdc0 as EXTEND(HDMI)*/
-&lcdc1 {
+/*lcdc0 as PRMRY(LCD),lcdc1 as EXTEND(HDMI)*/
+&lcdc0 {
        status = "okay";
        rockchip,mirror = <NO_MIRROR>;
        rockchip,cabc_mode = <0>;
@@ -457,7 +457,7 @@
                };
                
                lcd_cs:lcd_cs {
-rockchip,power_type = <GPIO>;
+                       rockchip,power_type = <GPIO>;
                        gpios = <&gpio7 GPIO_A4 GPIO_ACTIVE_HIGH>;
                        rockchip,delay = <10>;
                };
@@ -471,8 +471,9 @@ rockchip,power_type = <GPIO>;
        };
 };
 
-&lcdc0 {
+&lcdc1 {
        status = "okay";
+       rockchip,mirror = <NO_MIRROR>;
 };
 
 &hdmi {

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 7921181153b35b4110fe591219a045a32872145f..d597faabddd0a9aef62263de05d9f55b6b9ab2d8 100755 (executable)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -745,33 +745,30 @@
                status = "disabled";
        };
 
-       lcdc1: lcdc@ff940000 {
+       lcdc0: lcdc@ff930000 {
                compatible = "rockchip,rk3288-lcdc";
                rockchip,prop = <PRMRY>;
-               rochchip,pwr18 = <0>;
+               rockchip,pwr18 = <0>;
                rockchip,iommu-enabled = <1>;
-               reg = <0xff940000 0x10000>;
-               interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+               reg = <0xff930000 0x10000>;
+               interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                pinctrl-names = "default", "gpio";
                pinctrl-0 = <&lcdc0_lcdc>;
                pinctrl-1 = <&lcdc0_gpio>;
                status = "disabled";
-               clocks = <&clk_gates15 7>, <&dclk_lcdc1>, <&clk_gates15 8>, <&pd_vop1>;
+               clocks = <&clk_gates15 5>, <&dclk_lcdc0>, <&clk_gates15 6>, <&pd_vop0>;
                clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "pd_lcdc";
        };
 
-       lcdc0: lcdc@ff930000 {
+       lcdc1: lcdc@ff940000 {
                compatible = "rockchip,rk3288-lcdc";
                rockchip,prop = <EXTEND>;
-               rockchip,pwr18 = <0>;
+               rochchip,pwr18 = <0>;
                rockchip,iommu-enabled = <1>;
-               reg = <0xff930000 0x10000>;
-               interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
-               //pinctrl-names = "default", "gpio";
-               //pinctrl-0 = <&lcdc0_lcdc>;
-               //pinctrl-1 = <&lcdc0_gpio>;
+               reg = <0xff940000 0x10000>;
+               interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
-               clocks = <&clk_gates15 5>, <&dclk_lcdc0>, <&clk_gates15 6>, <&pd_vop0>;
+               clocks = <&clk_gates15 7>, <&dclk_lcdc1>, <&clk_gates15 8>, <&pd_vop1>;
                clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "pd_lcdc";
        };