sh-pfc: Consolidate pin definition macros
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Mon, 15 Jul 2013 15:42:48 +0000 (17:42 +0200)
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Mon, 29 Jul 2013 13:17:43 +0000 (15:17 +0200)
Move the pin definition macros to a common header file.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
drivers/pinctrl/sh-pfc/pfc-r8a7740.c
drivers/pinctrl/sh-pfc/pfc-sh7372.c
drivers/pinctrl/sh-pfc/pfc-sh73a0.c
drivers/pinctrl/sh-pfc/sh_pfc.h

index d8115331e6d3089f6b03fe3d5389c91b859d7d2c..288821b63323bc25dfbcd410e33aa9a570e336af 100644 (file)
@@ -1266,19 +1266,12 @@ static const u16 pinmux_data[] = {
        PINMUX_DATA(IRQ57_MARK,                 PORT329_FN0),
 };
 
-#define R8A73A4_PIN(pin, cfgs)                 \
-       {                                       \
-               .name = __stringify(PORT##pin), \
-               .enum_id = PORT##pin##_DATA,    \
-               .configs = cfgs,                \
-       }
-
 #define __O    (SH_PFC_PIN_CFG_OUTPUT)
 #define __IO   (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
 #define __PUD  (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
 
-#define R8A73A4_PIN_IO_PU_PD(pin)       R8A73A4_PIN(pin, __IO | __PUD)
-#define R8A73A4_PIN_O(pin)              R8A73A4_PIN(pin, __O)
+#define R8A73A4_PIN_IO_PU_PD(pin)       SH_PFC_PIN_CFG(pin, __IO | __PUD)
+#define R8A73A4_PIN_O(pin)              SH_PFC_PIN_CFG(pin, __O)
 
 static struct sh_pfc_pin pinmux_pins[] = {
        R8A73A4_PIN_IO_PU_PD(0), R8A73A4_PIN_IO_PU_PD(1),
index e6900511cb2bdfa7605f4a8cbfb4cd0ce042b369..b5bc1d09ff3b07439327aa79f51dc0747708c1ad 100644 (file)
@@ -1527,13 +1527,6 @@ static const u16 pinmux_data[] = {
        PINMUX_DATA(TRACEAUD_FROM_MEMC_MARK,                    MSEL5CR_30_1,   MSEL5CR_29_0),
 };
 
-#define R8A7740_PIN(pin, cfgs)                                         \
-       {                                                               \
-               .name = __stringify(PORT##pin),                         \
-               .enum_id = PORT##pin##_DATA,                            \
-               .configs = cfgs,                                        \
-       }
-
 #define __I            (SH_PFC_PIN_CFG_INPUT)
 #define __O            (SH_PFC_PIN_CFG_OUTPUT)
 #define __IO           (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
@@ -1541,15 +1534,15 @@ static const u16 pinmux_data[] = {
 #define __PU           (SH_PFC_PIN_CFG_PULL_UP)
 #define __PUD          (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
 
-#define R8A7740_PIN_I_PD(pin)          R8A7740_PIN(pin, __I | __PD)
-#define R8A7740_PIN_I_PU(pin)          R8A7740_PIN(pin, __I | __PU)
-#define R8A7740_PIN_I_PU_PD(pin)               R8A7740_PIN(pin, __I | __PUD)
-#define R8A7740_PIN_IO(pin)            R8A7740_PIN(pin, __IO)
-#define R8A7740_PIN_IO_PD(pin)         R8A7740_PIN(pin, __IO | __PD)
-#define R8A7740_PIN_IO_PU(pin)         R8A7740_PIN(pin, __IO | __PU)
-#define R8A7740_PIN_IO_PU_PD(pin)      R8A7740_PIN(pin, __IO | __PUD)
-#define R8A7740_PIN_O(pin)             R8A7740_PIN(pin, __O)
-#define R8A7740_PIN_O_PU_PD(pin)               R8A7740_PIN(pin, __O | __PUD)
+#define R8A7740_PIN_I_PD(pin)          SH_PFC_PIN_CFG(pin, __I | __PD)
+#define R8A7740_PIN_I_PU(pin)          SH_PFC_PIN_CFG(pin, __I | __PU)
+#define R8A7740_PIN_I_PU_PD(pin)       SH_PFC_PIN_CFG(pin, __I | __PUD)
+#define R8A7740_PIN_IO(pin)            SH_PFC_PIN_CFG(pin, __IO)
+#define R8A7740_PIN_IO_PD(pin)         SH_PFC_PIN_CFG(pin, __IO | __PD)
+#define R8A7740_PIN_IO_PU(pin)         SH_PFC_PIN_CFG(pin, __IO | __PU)
+#define R8A7740_PIN_IO_PU_PD(pin)      SH_PFC_PIN_CFG(pin, __IO | __PUD)
+#define R8A7740_PIN_O(pin)             SH_PFC_PIN_CFG(pin, __O)
+#define R8A7740_PIN_O_PU_PD(pin)       SH_PFC_PIN_CFG(pin, __O | __PUD)
 
 static struct sh_pfc_pin pinmux_pins[] = {
        /* Table 56-1 (I/O and Pull U/D) */
index 9174ff26738e5c3f5d472749a64abf9880527d30..17f1c17956c8173ffa9bbb44e9058c5f907d5233 100644 (file)
@@ -829,13 +829,6 @@ static const u16 pinmux_data[] = {
        PINMUX_DATA(MFIv4_MARK,         MSEL4CR_6_1),
 };
 
-#define SH7372_PIN(pin, cfgs)                                          \
-       {                                                               \
-               .name = __stringify(PORT##pin),                         \
-               .enum_id = PORT##pin##_DATA,                            \
-               .configs = cfgs,                                        \
-       }
-
 #define __I            (SH_PFC_PIN_CFG_INPUT)
 #define __O            (SH_PFC_PIN_CFG_OUTPUT)
 #define __IO           (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
@@ -843,15 +836,15 @@ static const u16 pinmux_data[] = {
 #define __PU           (SH_PFC_PIN_CFG_PULL_UP)
 #define __PUD          (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
 
-#define SH7372_PIN_I_PD(pin)           SH7372_PIN(pin, __I | __PD)
-#define SH7372_PIN_I_PU(pin)           SH7372_PIN(pin, __I | __PU)
-#define SH7372_PIN_I_PU_PD(pin)                SH7372_PIN(pin, __I | __PUD)
-#define SH7372_PIN_IO(pin)             SH7372_PIN(pin, __IO)
-#define SH7372_PIN_IO_PD(pin)          SH7372_PIN(pin, __IO | __PD)
-#define SH7372_PIN_IO_PU(pin)          SH7372_PIN(pin, __IO | __PU)
-#define SH7372_PIN_IO_PU_PD(pin)       SH7372_PIN(pin, __IO | __PUD)
-#define SH7372_PIN_O(pin)              SH7372_PIN(pin, __O)
-#define SH7372_PIN_O_PU_PD(pin)                SH7372_PIN(pin, __O | __PUD)
+#define SH7372_PIN_I_PD(pin)           SH_PFC_PIN_CFG(pin, __I | __PD)
+#define SH7372_PIN_I_PU(pin)           SH_PFC_PIN_CFG(pin, __I | __PU)
+#define SH7372_PIN_I_PU_PD(pin)                SH_PFC_PIN_CFG(pin, __I | __PUD)
+#define SH7372_PIN_IO(pin)             SH_PFC_PIN_CFG(pin, __IO)
+#define SH7372_PIN_IO_PD(pin)          SH_PFC_PIN_CFG(pin, __IO | __PD)
+#define SH7372_PIN_IO_PU(pin)          SH_PFC_PIN_CFG(pin, __IO | __PU)
+#define SH7372_PIN_IO_PU_PD(pin)       SH_PFC_PIN_CFG(pin, __IO | __PUD)
+#define SH7372_PIN_O(pin)              SH_PFC_PIN_CFG(pin, __O)
+#define SH7372_PIN_O_PU_PD(pin)                SH_PFC_PIN_CFG(pin, __O | __PUD)
 
 static struct sh_pfc_pin pinmux_pins[] = {
        /* Table 57-1 (I/O and Pull U/D) */
index 914b142d5c2cd44f3e770579d2a1dbedf11b853a..1d35b423afc9f8c0fb7763da72759742ea8e6a06 100644 (file)
@@ -1157,13 +1157,6 @@ static const u16 pinmux_data[] = {
        PINMUX_DATA(EDBGREQ_PU_MARK, MSEL4CR_MSEL1_1),
 };
 
-#define SH73A0_PIN(pin, cfgs)                                          \
-       {                                                               \
-               .name = __stringify(PORT##pin),                         \
-               .enum_id = PORT##pin##_DATA,                            \
-               .configs = cfgs,                                        \
-       }
-
 #define __I            (SH_PFC_PIN_CFG_INPUT)
 #define __O            (SH_PFC_PIN_CFG_OUTPUT)
 #define __IO           (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
@@ -1171,14 +1164,14 @@ static const u16 pinmux_data[] = {
 #define __PU           (SH_PFC_PIN_CFG_PULL_UP)
 #define __PUD          (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
 
-#define SH73A0_PIN_I_PD(pin)           SH73A0_PIN(pin, __I | __PD)
-#define SH73A0_PIN_I_PU(pin)           SH73A0_PIN(pin, __I | __PU)
-#define SH73A0_PIN_I_PU_PD(pin)                SH73A0_PIN(pin, __I | __PUD)
-#define SH73A0_PIN_IO(pin)             SH73A0_PIN(pin, __IO)
-#define SH73A0_PIN_IO_PD(pin)          SH73A0_PIN(pin, __IO | __PD)
-#define SH73A0_PIN_IO_PU(pin)          SH73A0_PIN(pin, __IO | __PU)
-#define SH73A0_PIN_IO_PU_PD(pin)       SH73A0_PIN(pin, __IO | __PUD)
-#define SH73A0_PIN_O(pin)              SH73A0_PIN(pin, __O)
+#define SH73A0_PIN_I_PD(pin)           SH_PFC_PIN_CFG(pin, __I | __PD)
+#define SH73A0_PIN_I_PU(pin)           SH_PFC_PIN_CFG(pin, __I | __PU)
+#define SH73A0_PIN_I_PU_PD(pin)                SH_PFC_PIN_CFG(pin, __I | __PUD)
+#define SH73A0_PIN_IO(pin)             SH_PFC_PIN_CFG(pin, __IO)
+#define SH73A0_PIN_IO_PD(pin)          SH_PFC_PIN_CFG(pin, __IO | __PD)
+#define SH73A0_PIN_IO_PU(pin)          SH_PFC_PIN_CFG(pin, __IO | __PU)
+#define SH73A0_PIN_IO_PU_PD(pin)       SH_PFC_PIN_CFG(pin, __IO | __PUD)
+#define SH73A0_PIN_O(pin)              SH_PFC_PIN_CFG(pin, __O)
 
 static struct sh_pfc_pin pinmux_pins[] = {
        /* Table 25-1 (I/O and Pull U/D) */
index ebddfe03417239cd69c6e0e3b960fffa7d1189cd..f7c5b808c43038a10dec5275199fe28f972bde01 100644 (file)
@@ -273,6 +273,14 @@ struct sh_pfc_soc_info {
                .enum_id = data_or_mark,                                \
        }
 
+/* SH_PFC_PIN_CFG - Expand to a sh_pfc_pin entry (named PORT#) with config */
+#define SH_PFC_PIN_CFG(pin, cfgs)                                      \
+       {                                                               \
+               .name = __stringify(PORT##pin),                         \
+               .enum_id = PORT##pin##_DATA,                            \
+               .configs = cfgs,                                        \
+       }
+
 /* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
  *                  PORT_name_OUT, PORT_name_IN marks
  */