UPSTREAM: usb: dwc3: omap: Pass VBUS and ID events transparently

Don't make any decisions regarding VBUS session based on ID
status. That is best left to the OTG core.

Pass ID and VBUS events independent of each other so that OTG
core knows exactly what to do.

This makes dual-role with extcon work with OTG irq on OMAP platforms.

Change-Id: I141c03d4127b69530e77cfef3cee5f5b95f6df26
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit d2728fb3e01f9265571a5f7a5feeac4493d2a365)

diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index 046bb379120e0ca3ad46eb3a9b4db6388057aaf4..29e80cc9b634aab72f59e73c71667dfef9f86a45 100644 (file)
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -231,18 +231,14 @@ static void dwc3_omap_set_mailbox(struct dwc3_omap *omap,
                }
 
                val = dwc3_omap_read_utmi_ctrl(omap);
-               val &= ~(USBOTGSS_UTMI_OTG_CTRL_IDDIG
-                               | USBOTGSS_UTMI_OTG_CTRL_VBUSVALID
-                               | USBOTGSS_UTMI_OTG_CTRL_SESSEND);
-               val |= USBOTGSS_UTMI_OTG_CTRL_SESSVALID;
+               val &= ~USBOTGSS_UTMI_OTG_CTRL_IDDIG;
                dwc3_omap_write_utmi_ctrl(omap, val);
                break;
 
        case OMAP_DWC3_VBUS_VALID:
                val = dwc3_omap_read_utmi_ctrl(omap);
                val &= ~USBOTGSS_UTMI_OTG_CTRL_SESSEND;
-               val |= USBOTGSS_UTMI_OTG_CTRL_IDDIG
-                               | USBOTGSS_UTMI_OTG_CTRL_VBUSVALID
+               val |= USBOTGSS_UTMI_OTG_CTRL_VBUSVALID
                                | USBOTGSS_UTMI_OTG_CTRL_SESSVALID;
                dwc3_omap_write_utmi_ctrl(omap, val);
                break;
@@ -250,13 +246,15 @@ static void dwc3_omap_set_mailbox(struct dwc3_omap *omap,
        case OMAP_DWC3_ID_FLOAT:
                if (omap->vbus_reg)
                        regulator_disable(omap->vbus_reg);
+               val = dwc3_omap_read_utmi_ctrl(omap);
+               val |= USBOTGSS_UTMI_OTG_CTRL_IDDIG;
+               dwc3_omap_write_utmi_ctrl(omap, val);
 
        case OMAP_DWC3_VBUS_OFF:
                val = dwc3_omap_read_utmi_ctrl(omap);
                val &= ~(USBOTGSS_UTMI_OTG_CTRL_SESSVALID
                                | USBOTGSS_UTMI_OTG_CTRL_VBUSVALID);
-               val |= USBOTGSS_UTMI_OTG_CTRL_SESSEND
-                               | USBOTGSS_UTMI_OTG_CTRL_IDDIG;
+               val |= USBOTGSS_UTMI_OTG_CTRL_SESSEND;
                dwc3_omap_write_utmi_ctrl(omap, val);
                break;