setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
+ if (Subtarget->is64Bit()) {
+ setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);
+ setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand);
+ setOperationAction(ISD::MULHU, MVT::i64, Expand);
+ setOperationAction(ISD::MULHS, MVT::i64, Expand);
+ }
+
// VASTART needs to be custom lowered to use the VarArgsFrameIndex.
setOperationAction(ISD::VASTART , MVT::Other, Custom);
// VAARG needs to be lowered to not do unaligned accesses for doubles.
%tmp1 = urem i64 %X, %Y
ret i64 %tmp1
}
+
+; PR18150
+; CHECK-LABEL: test3
+; CHECK: sethi 2545, [[R0:%[gilo][0-7]]]
+; CHECK: or [[R0]], 379, [[R1:%[gilo][0-7]]]
+; CHECK: mulx %o0, [[R1]], [[R2:%[gilo][0-7]]]
+; CHECK: udivx [[R2]], 1021, [[R3:%[gilo][0-7]]]
+; CHECK: mulx [[R3]], 1021, [[R4:%[gilo][0-7]]]
+; CHECK: sub [[R2]], [[R4]], %o0
+
+define i64 @test3(i64 %b) {
+entry:
+ %mul = mul i64 %b, 2606459
+ %rem = urem i64 %mul, 1021
+ ret i64 %rem
+}