ARM64: pd: rockchip: support power domains for rk3368

support powerdomains for rk3368.
rename the pd id to RK3368_XX.

Change-Id: I5ac402e1eac271d847fb76b3c33fa2801c9994aa
Signed-off-by: zhangqing <zhangqing@rock-chips.com>

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index 22379c0ee5566efdbd588b218bfd622614ef02b6..5a2a9c51c32bb665b659dbadf3342c4bca5e3034 100644 (file)
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -443,6 +443,7 @@ CONFIG_ION_ROCKCHIP=y
 CONFIG_MAILBOX=y
 CONFIG_RK_IOMMU=y
 CONFIG_RK_IOVMM=y
+CONFIG_ROCKCHIP_PM_DOMAINS=y
 CONFIG_PM_DEVFREQ=y
 CONFIG_IIO=y
 CONFIG_ROCKCHIP_SARADC=y

diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 534c58937a566205b85e216bf1e230c9186a637f..6cdffb13c862ec01ea03be8bca08df92f6b9d2ca 100644 (file)
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -18,6 +18,7 @@
 #include <linux/regmap.h>
 #include <linux/mfd/syscon.h>
 #include <dt-bindings/power/rk3288-power.h>
+#include <dt-bindings/power/rk3368-power.h>
 
 struct rockchip_domain_info {
        int pwr_mask;
@@ -75,6 +76,9 @@ struct rockchip_pmu {
 #define DOMAIN_RK3288(pwr, status, req)                \
        DOMAIN(pwr, status, req, req, (req) + 16)
 
+#define DOMAIN_RK3368(pwr, status, req)                \
+       DOMAIN(pwr, status, req, (req) + 16, req)
+
 static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd)
 {
        struct rockchip_pmu *pmu = pd->pmu;
@@ -444,6 +448,14 @@ static const struct rockchip_domain_info rk3288_pm_domains[] = {
        [RK3288_PD_GPU]         = DOMAIN_RK3288(9, 9, 2),
 };
 
+static const struct rockchip_domain_info rk3368_pm_domains[] = {
+       [RK3368_PD_PERI]        = DOMAIN_RK3368(13, 12, 6),
+       [RK3368_PD_VIO]         = DOMAIN_RK3368(15, 14, 8),
+       [RK3368_PD_VIDEO]       = DOMAIN_RK3368(14, 13, 7),
+       [RK3368_PD_GPU_0]       = DOMAIN_RK3368(16, 15, 2),
+       [RK3368_PD_GPU_1]       = DOMAIN_RK3368(17, 16, 2),
+};
+
 static const struct rockchip_pmu_info rk3288_pmu = {
        .pwr_offset = 0x08,
        .status_offset = 0x0c,
@@ -461,11 +473,32 @@ static const struct rockchip_pmu_info rk3288_pmu = {
        .domain_info = rk3288_pm_domains,
 };
 
+static const struct rockchip_pmu_info rk3368_pmu = {
+       .pwr_offset = 0x0c,
+       .status_offset = 0x10,
+       .req_offset = 0x3c,
+       .idle_offset = 0x40,
+       .ack_offset = 0x40,
+
+       .core_pwrcnt_offset = 0x48,
+       .gpu_pwrcnt_offset = 0x50,
+
+       .core_power_transition_time = 24,
+       .gpu_power_transition_time = 24,
+
+       .num_domains = ARRAY_SIZE(rk3368_pm_domains),
+       .domain_info = rk3368_pm_domains,
+};
+
 static const struct of_device_id rockchip_pm_domain_dt_match[] = {
        {
                .compatible = "rockchip,rk3288-power-controller",
                .data = (void *)&rk3288_pmu,
        },
+       {
+               .compatible = "rockchip,rk3368-power-controller",
+               .data = (void *)&rk3368_pmu,
+       },
        { /* sentinel */ },
 };
 

diff --git a/include/dt-bindings/power/rk3368-power.h b/include/dt-bindings/power/rk3368-power.h
index 2a1222bce4eae4a2e9c9ac7b124e654f27b53ffc..93633d57ed8485bb657979438bd355cc6cdb3edb 100644 (file)
--- a/include/dt-bindings/power/rk3368-power.h
+++ b/include/dt-bindings/power/rk3368-power.h
@@ -2,27 +2,27 @@
 #define __DT_BINDINGS_POWER_RK3368_POWER_H__
 
 /* VD_CORE */
-#define PD_A53_L0      0
-#define PD_A53_L1      1
-#define PD_A53_L2      2
-#define PD_A53_L3      3
-#define PD_SCU_L       4
-#define PD_A53_B0      5
-#define PD_A53_B1      6
-#define PD_A53_B2      7
-#define PD_A53_B3      8
-#define PD_SCU_B       9
+#define RK3368_PD_A53_L0       0
+#define RK3368_PD_A53_L1       1
+#define RK3368_PD_A53_L2       2
+#define RK3368_PD_A53_L3       3
+#define RK3368_PD_SCU_L                4
+#define RK3368_PD_A53_B0       5
+#define RK3368_PD_A53_B1       6
+#define RK3368_PD_A53_B2       7
+#define RK3368_PD_A53_B3       8
+#define RK3368_PD_SCU_B                9
 
 /* VD_LOGIC */
-#define PD_BUS         10
-#define PD_PERI                11
-#define PD_VIO         12
-#define PD_ALIVE       13
-#define PD_VIDEO       14
-#define PD_GPU_0       15
-#define PD_GPU_1       16
+#define RK3368_PD_BUS          10
+#define RK3368_PD_PERI         11
+#define RK3368_PD_VIO          12
+#define RK3368_PD_ALIVE                13
+#define RK3368_PD_VIDEO                14
+#define RK3368_PD_GPU_0                15
+#define RK3368_PD_GPU_1                16
 
 /* VD_PMU */
-#define PD_PMU         17
+#define RK3368_PD_PMU          17
 
 #endif