clk: rockchip: rk3399: delete the CLK_IGNORE_UNUSED for pvtm clks

These clks will be enabed and disabled in pvtm driver.

Change-Id: I742a8c4ef5877486fb21c014f1e4ab27f72e468d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index b5bbc3126fc1502bac05f68c8d8ff97b847eddac..03fafd0314c71a6db7f444824bfcb5530b587d2e 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -523,7 +523,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
                        RK3399_CLKGATE_CON(14), 10, GFLAGS),
        GATE(ACLK_GIC_ADB400_CORE_L_2_GIC, "aclk_core_adb400_core_l_2_gic", "armclkl", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(14), 11, GFLAGS),
-       GATE(SCLK_PVTM_CORE_L, "clk_pvtm_core_l", "xin24m", CLK_IGNORE_UNUSED,
+       GATE(SCLK_PVTM_CORE_L, "clk_pvtm_core_l", "xin24m", 0,
                        RK3399_CLKGATE_CON(0), 7, GFLAGS),
 
        /* big core */
@@ -564,7 +564,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
        GATE(0, "pclk_dbg_cxcs_pd_core_b", "pclk_dbg_core_b", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(14), 2, GFLAGS),
 
-       GATE(SCLK_PVTM_CORE_B, "clk_pvtm_core_b", "xin24m", CLK_IGNORE_UNUSED,
+       GATE(SCLK_PVTM_CORE_B, "clk_pvtm_core_b", "xin24m", 0,
                        RK3399_CLKGATE_CON(1), 7, GFLAGS),
 
        /* gmac */
@@ -707,7 +707,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
        GATE(PCLK_DDR_SGRF, "pclk_ddr_sgrf", "pclk_ddr", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(19), 2, GFLAGS),
 
-       GATE(SCLK_PVTM_DDR, "clk_pvtm_ddr", "xin24m", CLK_IGNORE_UNUSED,
+       GATE(SCLK_PVTM_DDR, "clk_pvtm_ddr", "xin24m", 0,
                        RK3399_CLKGATE_CON(4), 11, GFLAGS),
        GATE(SCLK_DFIMON0_TIMER, "clk_dfimon0_timer", "xin24m", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(3), 5, GFLAGS),
@@ -1484,7 +1484,7 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = {
        GATE(SCLK_TIMER12_PMU, "clk_timer0_pmu", "clk_timer_src_pmu", 0, RK3399_PMU_CLKGATE_CON(0), 3, GFLAGS),
        GATE(SCLK_TIMER13_PMU, "clk_timer1_pmu", "clk_timer_src_pmu", 0, RK3399_PMU_CLKGATE_CON(0), 4, GFLAGS),
 
-       GATE(SCLK_PVTM_PMU, "clk_pvtm_pmu", "xin24m", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(0), 7, GFLAGS),
+       GATE(SCLK_PVTM_PMU, "clk_pvtm_pmu", "xin24m", 0, RK3399_PMU_CLKGATE_CON(0), 7, GFLAGS),
 
        GATE(PCLK_PMU, "pclk_pmu", "pclk_pmu_src", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(1), 0, GFLAGS),
        GATE(PCLK_PMUGRF_PMU, "pclk_pmugrf_pmu", "pclk_pmu_src", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(1), 1, GFLAGS),