If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55840 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86CallingConv.td b/lib/Target/X86/X86CallingConv.td
index 549eb9b9a200c6f0e9ca1a47a3bdf1c5d8698e2c..e720b0b3b229e589c26442d978acb7ddc4182020 100644 (file)
--- a/lib/Target/X86/X86CallingConv.td
+++ b/lib/Target/X86/X86CallingConv.td
@@ -352,6 +352,12 @@ def CC_X86_32_FastCC : CallingConv<[
   // The first 2 integer arguments are passed in ECX/EDX
   CCIfType<[i32], CCAssignToReg<[ECX, EDX]>>,
 
+  // The first 3 float or double arguments, if the call is not a vararg
+  // call and if SSE2 is available, are passed in SSE registers.
+  CCIfNotVarArg<CCIfType<[f32,f64],
+                CCIfSubtarget<"hasSSE2()",
+                CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
+
   // Doubles get 8-byte slots that are 8-byte aligned.
   CCIfType<[f64], CCAssignToStack<8, 8>>,
 

diff --git a/test/CodeGen/X86/constant-pool-remat-0.ll b/test/CodeGen/X86/constant-pool-remat-0.ll
index 144d442d50d3cafbbf9b5b8a4ade0a3bd2835a49..40caaa6b936a3ed3c8a91096f5bfb606c0b63448 100644 (file)
--- a/test/CodeGen/X86/constant-pool-remat-0.ll
+++ b/test/CodeGen/X86/constant-pool-remat-0.ll
@@ -1,13 +1,13 @@
 ; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3
 ; RUN: llvm-as < %s | llc -march=x86-64 -stats  -info-output-file - | grep asm-printer | grep 6
 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | count 3
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats  -info-output-file - | grep asm-printer | grep 8
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats  -info-output-file - | grep asm-printer | grep 12
 
-declare fastcc float @qux(float %y)
+declare float @qux(float %y)
 
-define fastcc float @array(float %a) nounwind {
+define float @array(float %a) nounwind {
   %n = mul float %a, 9.0
-  %m = call fastcc float @qux(float %n)
+  %m = call float @qux(float %n)
   %o = mul float %m, 9.0
   ret float %o
 }

diff --git a/test/CodeGen/X86/fastcc-2.ll b/test/CodeGen/X86/fastcc-2.ll
new file mode 100644 (file)
index 0000000..40c753e
--- /dev/null
+++ b/test/CodeGen/X86/fastcc-2.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep movsd
+; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 1
+
+define i32 @foo() nounwind {
+entry:
+       tail call fastcc void @bar( double 1.000000e+00 ) nounwind
+       ret i32 0
+}
+
+declare fastcc void @bar(double)

diff --git a/test/CodeGen/X86/fastcc.ll b/test/CodeGen/X86/fastcc.ll
index 13068bada2751b3a6b44f57df13735160dc4c84e..07af8051176a96483d2631bf06276ae60e8aba9e 100644 (file)
--- a/test/CodeGen/X86/fastcc.ll
+++ b/test/CodeGen/X86/fastcc.ll
@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep mov | grep ecx | grep 0
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep mov | grep xmm0 | grep 16
+; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep mov | grep xmm0 | grep 8
 
 @d = external global double            ; <double*> [#uses=1]
 @c = external global double            ; <double*> [#uses=1]