Rework braindead conditionals I put in yesterday.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111974 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index 81ecdb50edffa9b9454496d51b3adda013f10f8b..51dbfc2f121869e9cbd654ba705f5f62796d6a93 100644 (file)
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -365,20 +365,18 @@ bool ARMFastISel::ARMLoadAlloca(const Instruction *I) {
   Value *Op0 = I->getOperand(0);
 
   // Verify it's an alloca.
-  const Instruction *Inst = dyn_cast<Instruction>(Op0);
-  if (!Inst || Inst->getOpcode() != Instruction::Alloca) return false;
-
-  const AllocaInst *AI = cast<AllocaInst>(Op0);
-  DenseMap<const AllocaInst*, int>::iterator SI =
-    FuncInfo.StaticAllocaMap.find(AI);
-    
-  if (SI != FuncInfo.StaticAllocaMap.end()) {
-    unsigned ResultReg = createResultReg(FixedRC);
-    TII.loadRegFromStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt,
-                              ResultReg, SI->second, FixedRC,
-                              TM.getRegisterInfo());
-    UpdateValueMap(I, ResultReg);
-    return true;
+  if (const AllocaInst *AI = dyn_cast<AllocaInst>(Op0)) {
+    DenseMap<const AllocaInst*, int>::iterator SI =
+      FuncInfo.StaticAllocaMap.find(AI);
+
+    if (SI != FuncInfo.StaticAllocaMap.end()) {
+      unsigned ResultReg = createResultReg(FixedRC);
+      TII.loadRegFromStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt,
+                               ResultReg, SI->second, FixedRC,
+                               TM.getRegisterInfo());
+      UpdateValueMap(I, ResultReg);
+      return true;
+    }
   }
   
   return false;