ARM: dts: rk3228: add vop/vpu/hevc/iep iommu config
authorSimon Xue <xxm@rock-chips.com>
Wed, 14 Oct 2015 02:43:25 +0000 (10:43 +0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Wed, 14 Oct 2015 08:28:18 +0000 (16:28 +0800)
Change-Id: Id784598ad7af4ddb5569423a4f77e035b4a7c9d0
Signed-off-by: Simon Xue <xxm@rock-chips.com>
arch/arm/boot/dts/rk3228.dtsi

index 1c36a651207eb29b68bb86f24d9a8a85add77c7b..6d1f9a4b911c52e815ea536f8c2270c608e88b6a 100644 (file)
                                  "Mali_PP1_IRQ",
                                  "Mali_PP1_MMU_IRQ";
        };
+
+       vop_mmu {
+               dbgname = "vop";
+               compatible = "rockchip,vop_mmu";
+               reg = <0x20053f00 0x100>;
+               interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vop_mmu";
+       };
+
+       hevc_mmu {
+               dbgname = "hevc";
+               compatible = "rockchip,hevc_mmu";
+               reg = <0x20034440 0x40>,
+                     <0x20034480 0x40>;
+               interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "hevc_mmu";
+       };
+
+       vpu_mmu {
+               dbgname = "vpu";
+               compatible = "rockchip,vpu_mmu";
+               reg = <0x20026800 0x100>;
+               interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vpu_mmu";
+       };
+
+       iep_mmu {
+               dbgname = "iep";
+               compatible = "rockchip,iep_mmu";
+               reg = <0x20078800 0x100>;
+               interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "iep_mmu";
+       };
  };