Peephole optimize SUBmi{16,32} into SUBmi{16,32}b when immediate is 8

bits wide.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11548 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/PeepholeOptimizer.cpp b/lib/Target/X86/PeepholeOptimizer.cpp
index 27baa521e84df5280e42a71c8ae5e3e008f4df4b..3e0af70717c4d0753f644d75c63c70c01ca9ff26 100644 (file)
--- a/lib/Target/X86/PeepholeOptimizer.cpp
+++ b/lib/Target/X86/PeepholeOptimizer.cpp
@@ -154,6 +154,7 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
 
 
   case X86::ADDmi16:  case X86::ADDmi32:
+  case X86::SUBmi16:  case X86::SUBmi32:
   case X86::ANDmi16:  case X86::ANDmi32:
     assert(MI->getNumOperands() == 5 && "These should all have 5 operands!");
     if (MI->getOperand(4).isImmediate()) {
@@ -165,6 +166,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
         default: assert(0 && "Unknown opcode value!");
         case X86::ADDmi16:  Opcode = X86::ADDmi16b; break;
         case X86::ADDmi32:  Opcode = X86::ADDmi32b; break;
+        case X86::SUBmi16:  Opcode = X86::SUBmi16b; break;
+        case X86::SUBmi32:  Opcode = X86::SUBmi32b; break;
         case X86::ANDmi16:  Opcode = X86::ANDmi16b; break;
         case X86::ANDmi32:  Opcode = X86::ANDmi32b; break;
         }

diff --git a/lib/Target/X86/X86PeepholeOpt.cpp b/lib/Target/X86/X86PeepholeOpt.cpp
index 27baa521e84df5280e42a71c8ae5e3e008f4df4b..3e0af70717c4d0753f644d75c63c70c01ca9ff26 100644 (file)
--- a/lib/Target/X86/X86PeepholeOpt.cpp
+++ b/lib/Target/X86/X86PeepholeOpt.cpp
@@ -154,6 +154,7 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
 
 
   case X86::ADDmi16:  case X86::ADDmi32:
+  case X86::SUBmi16:  case X86::SUBmi32:
   case X86::ANDmi16:  case X86::ANDmi32:
     assert(MI->getNumOperands() == 5 && "These should all have 5 operands!");
     if (MI->getOperand(4).isImmediate()) {
@@ -165,6 +166,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
         default: assert(0 && "Unknown opcode value!");
         case X86::ADDmi16:  Opcode = X86::ADDmi16b; break;
         case X86::ADDmi32:  Opcode = X86::ADDmi32b; break;
+        case X86::SUBmi16:  Opcode = X86::SUBmi16b; break;
+        case X86::SUBmi32:  Opcode = X86::SUBmi32b; break;
         case X86::ANDmi16:  Opcode = X86::ANDmi16b; break;
         case X86::ANDmi32:  Opcode = X86::ANDmi32b; break;
         }