phy: qcom: Add APQ8064 SATA PHY device tree bindings
authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Mon, 14 Jul 2014 11:18:08 +0000 (12:18 +0100)
committerKishon Vijay Abraham I <kishon@ti.com>
Tue, 22 Jul 2014 07:16:11 +0000 (12:46 +0530)
This patch adds binding spec for Qualcomm AP8064 SATA PHY.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Kiran Padwal <kiran.padwal@smartplayin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Documentation/devicetree/bindings/phy/qcom-apq8064-sata-phy.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/phy/qcom-apq8064-sata-phy.txt b/Documentation/devicetree/bindings/phy/qcom-apq8064-sata-phy.txt
new file mode 100644 (file)
index 0000000..952f6c9
--- /dev/null
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+Qualcomm APQ8064 SATA PHY Controller
+------------------------------------
+
+SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
+Each SATA PHY controller should have its own node.
+
+Required properties:
+- compatible: compatible list, contains "qcom,apq8064-sata-phy".
+- reg: offset and length of the SATA PHY register set;
+- #phy-cells: must be zero
+- clocks: a list of phandles and clock-specifier pairs, one for each entry in
+  clock-names.
+- clock-names: must be "cfg" for phy config clock.
+
+Example:
+       sata_phy: sata-phy@1b400000 {
+               compatible = "qcom,apq8064-sata-phy";
+               reg = <0x1b400000 0x200>;
+
+               clocks = <&gcc SATA_PHY_CFG_CLK>;
+               clock-names = "cfg";
+
+               #phy-cells = <0>;
+       };