#if defined(CONFIG_HDMI_RK30)
#include "../../../drivers/video/rockchip/hdmi/rk_hdmi.h"
#endif
+#include <linux/mfd/tlv320aic3262-core.h>
+#include <linux/mfd/tlv320aic3262-registers.h>
#if defined(CONFIG_SPIM_RK29)
#include "../../../drivers/spi/rk29_spim.h"
#endif
};
+static struct aic3262_gpio_setup aic3262_gpio[] = {
+ { // GPIO1
+ .used = 0,
+ .in = 0,
+ .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
+
+ },
+ {// GPIO2
+ .used = 0,
+ .in = 0,
+ .value = AIC3262_GPIO2_FUNC_CLOCK_OUTPUT,
+ },
+ {// GPI1
+ .used = 1,
+ .in = 1,
+ .value = 0,
+ },
+ {// GPI2
+ .used = 1,
+ .in = 1,
+ .value = AIC3262_GPO1_FUNC_DISABLED,
+ },
+ {// GPO1
+ .used = 0,
+ .in = 0,
+ .value = AIC3262_GPO1_FUNC_ADC_MOD_CLK_OUTPUT,
+ },
+};
+static struct aic3262_pdata aic3262_codec_pdata = {
+ .gpio = aic3262_gpio,
+ .gpio_reset = RK30_PIN0_PB7,
+};
+
// i2c
#ifdef CONFIG_I2C0_RK30
static struct i2c_board_info __initdata i2c0_info[] = {
.type = "tlv320aic3262",
.addr = 0x18,
.flags = 0,
+ .platform_data = &aic3262_codec_pdata,
},
#endif
#include <linux/mfd/tlv320aic3262-core.h>
#include <linux/mfd/tlv320aic3262-registers.h>
+#include <mach/gpio.h>
+#include <mach/iomux.h>
+
#define DEBUG 1
struct aic3262_gpio
{
u8 revID, pgID;
unsigned int naudint = 0;
u8 resetVal = 1;
- printk("aic3262_device_init beginning\n");
+ //printk("aic3262_device_init beginning\n");
mutex_init(&aic3262->io_lock);
dev_set_drvdata(aic3262->dev, aic3262);
dev_err(aic3262->dev,"not able to acquire gpio %d for reseting the AIC3262 \n", pdata->gpio_reset);
goto err_return;
}
+ rk30_mux_api_set(GPIO0B7_I2S8CHSDO3_NAME, GPIO0B_GPIO0B7);
gpio_direction_output(pdata->gpio_reset, 1);
msleep(5);
gpio_direction_output(pdata->gpio_reset, 0);
msleep(5);
gpio_direction_output(pdata->gpio_reset, 1);
// gpio_set_value(pdata->gpio_reset, 0);
- msleep(5);
-
-
+ msleep(5);
}
}
int ret;
printk("test palyback start\n");
- record_in1lr( );
+ AP_to_headphone( );
}
rk30_mux_api_set(GPIO0B2_I2S8CHLRCKRX_NAME, GPIO0B_I2S_8CH_LRCK_RX);
rk30_mux_api_set(GPIO0B3_I2S8CHLRCKTX_NAME, GPIO0B_I2S_8CH_LRCK_TX);
rk30_mux_api_set(GPIO0B4_I2S8CHSDO0_NAME, GPIO0B_I2S_8CH_SDO0);
- rk30_mux_api_set(GPIO0B5_I2S8CHSDO1_NAME, GPIO0B_I2S_8CH_SDO1);
- rk30_mux_api_set(GPIO0B6_I2S8CHSDO2_NAME, GPIO0B_I2S_8CH_SDO2);
- rk30_mux_api_set(GPIO0B7_I2S8CHSDO3_NAME, GPIO0B_I2S_8CH_SDO3);
+ //rk30_mux_api_set(GPIO0B5_I2S8CHSDO1_NAME, GPIO0B_I2S_8CH_SDO1);
+ //rk30_mux_api_set(GPIO0B6_I2S8CHSDO2_NAME, GPIO0B_I2S_8CH_SDO2);
+ //rk30_mux_api_set(GPIO0B7_I2S8CHSDO3_NAME, GPIO0B_I2S_8CH_SDO3);
break;
case 1:
rk30_mux_api_set(GPIO0C0_I2S12CHCLK_NAME, GPIO0C_I2S1_2CH_CLK);