Added isReMaterializable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35160 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index fbc972a29284a20f0e2bd38cde95996e5b589e33..b1ef5c935798b3d7f90a4b22c07523c07441acb8 100644 (file)
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -165,6 +165,7 @@ class Instruction {
   bit isConvertibleToThreeAddress = 0;  // Can this 2-addr instruction promote?
   bit isCommutable = 0;     // Is this 3 operand instruction commutable?
   bit isTerminator = 0;     // Is this part of the terminator for a basic block?
+  bit isReMaterializable = 0; // Is this instruction re-materializable?
   bit hasDelaySlot = 0;     // Does this instruction have an delay slot?
   bit usesCustomDAGSchedInserter = 0; // Pseudo instr needing special help.
   bit hasCtrlDep   = 0;     // Does this instruction r/w ctrl-flow chains?