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grammar tweak
author
Jim Grosbach
<grosbach@apple.com>
Tue, 7 Sep 2010 21:30:25 +0000
(21:30 +0000)
committer
Jim Grosbach
<grosbach@apple.com>
Tue, 7 Sep 2010 21:30:25 +0000
(21:30 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113289
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/ARM/ARMInstrThumb.td
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diff --git
a/lib/Target/ARM/ARMInstrThumb.td
b/lib/Target/ARM/ARMInstrThumb.td
index a13ff12327491612c95f7f011e5df20bf899e844..da2efb8566da7b34bc3ebecb5ba8b8f2120fe31b 100644
(file)
--- a/
lib/Target/ARM/ARMInstrThumb.td
+++ b/
lib/Target/ARM/ARMInstrThumb.td
@@
-535,7
+535,7
@@
def tSpill : T1pIs<(outs), (ins tGPR:$src, t_addrmode_sp:$addr), IIC_iStorei,
// Load / store multiple Instructions.
//
-// These require
s
base address to be written back or one of the loaded regs.
+// These require base address to be written back or one of the loaded regs.
let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1 in {
def tLDM : T1I<(outs),
(ins addrmode4:$addr, pred:$p, reglist:$dsts, variable_ops),