drm/i915/bxt: add workaround to avoid PTE corruption

Set TLBPF in TILECTL. This fixes an issue with BXT HW seeing
corrupted pte entries.

v2:
- move the workaround to bxt_init_clock_gating (imre)

Signed-off-by: Robert Beckett <robert.beckett@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a22745855740795c7c8f5ee4fbcb32156796c02d..21e69cab6efe0c9e2f551b5fa8b1b7bb80015c9b 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1150,6 +1150,7 @@ enum skl_disp_power_wells {
 /* control register for cpu gtt access */
 #define TILECTL                                0x101000
 #define   TILECTL_SWZCTL                       (1 << 0)
+#define   TILECTL_TLBPF                        (1 << 1)
 #define   TILECTL_TLB_PREFETCH_DIS     (1 << 2)
 #define   TILECTL_BACKSNOOP_DIS                (1 << 3)
 

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 07b3780677c92f6896376671839b618de92e851d..47246380675959456086a7c80fa762c96b9f181f 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -110,6 +110,8 @@ static void bxt_init_clock_gating(struct drm_device *dev)
                   GEN8_SDEUNIT_CLOCK_GATE_DISABLE |
                   GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
 
+       /* FIXME: apply on A0 only */
+       I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_TLBPF);
 }
 
 static void i915_pineview_get_mem_freq(struct drm_device *dev)